ADC12QS065

ADC12QS065 www.ti.com SNOSAD6I – JULY 2005 – REVISED APRIL 2013 ADC12QS065 Quad 12-Bit 65 MSPS A/D Converter with LVDS Serialized Outputs Check for Samples: ADC12QS065 FEATURES 1 2 Single +3.3V Supply Operation Internal Sample-and-Hold and Internal Reference Low Power Consumption Power Down Mode Clock and Data Frame Timing 780 Mbps Serial LVDS Data Rate (at 65 MHz Clock) LVDS Serial Output Rated for 100 Ohm Load KEY SPECIFICATIONS Resolution: 12 Bits DNL: ±0.3 LSB (Typ) SNR (fIN = 5 MHz): 69 dB (Typ) SFDR (fIN = 5 MHz): 83 dB (Typ) ENOB (at Nyquist): 11 Bits (Typ) Power Consumption – Operating, 65 MSPS, per ADC: 200 mW (Typ) – Power Down Mode: < 3 mW (Typ) APPLICATIONS Ultrasound Medical Imaging Communications Portable Instrumentation Digital Video DESCRIPTION The ADC12QS065 is a low power, high performance CMOS 4-channel analog-to-digital converter with LVDS serialized outputs. The ADC12QS065 digitizes signals to 12 bits resolution at sampling rates up to 65 MSPS while consuming a typical 200 mW/ADC from a single 3.3V supply. Sampled data is transformed into high speed serial LVDS output data streams. Clock and frame LVDS pairs aid in data capture. The ADC12QS065’s six differential pairs transmit data over backplanes or cable and also make PCB design easier. In addition, the reduced cable, PCB trace count, and connector size tremendously reduce cost. No missing codes performance is ensured over the full operating temperature range. The...