MC74HCT595A

DATA SHEET www.onsemi.com 8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs High−Performance Silicon−Gate CMOS MC74HC595A, MC74HCT595A The MC74HC595A/MC74HCT595A consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock inputs. This device also has an asynchronous reset for the shift register. The device directly interfaces with the SPI serial data port on CMOS MPUs and MCUs. The MC74HC595A device inputs are compatible Standard CMOS outputs; with pullup resistors, they are compatible with TTL outputs. The MC74HCT595A device inputs are compatible Standard CMOS or TTL outputs. Features  Output Drive Capability: 15 LSTTL Loads  Outputs Directly Interface to CMOS, NMOS, and TTL  Operating Voltage Range: 2.0 to 6.0 V (HC), 4.5 to 5.5 V (HCT)  Low Input Current: 1.0 mA  High Noise Immunity Characteristic of CMOS Devices  In Compliance with the Requirements Defined by JEDEC Standard No. 7 A  Chip Complexity: 328 FETs or 82 Equivalent Gates  Improvements over HC595/HCT595  Improved Propagation Delays  50% Lower Quiescent Power  Improved Input Noise and Latchup Immunity  −Q Suffix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable  T...