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LTC2162

Linear Technology

Low-Power ADC

Features n 77dB SNR n 90dB SFDR n Low Power: 87mW/63mW/45mW n Single 1.8V Supply n CMOS, DDR CMOS, or DDR LVDS Outputs n...


Linear Technology

LTC2162

File Download Download LTC2162 Datasheet


Description
Features n 77dB SNR n 90dB SFDR n Low Power: 87mW/63mW/45mW n Single 1.8V Supply n CMOS, DDR CMOS, or DDR LVDS Outputs n Selectable Input Ranges: 1VP-P to 2VP-P n 550MHz Full Power Bandwidth S/H n Optional Data Output Randomizer n Optional Clock Duty Cycle Stabilizer n Shutdown and Nap Modes n Serial SPI Port for Configuration n 48-Pin (7mm × 7mm) QFN Package Applications n Communications n Cellular Base Stations n Software Defined Radios n Portable Medical Imaging n Multichannel Data Acquisition n Nondestructive Testing LTC2162/LTC2161/LTC2160 16-Bit, 65Msps/ 40Msps/25Msps Low Power ADCs Description The LTC®2162/LTC2161/LTC2160 are sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 77dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.3LSBRMS. The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full spee...




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