Document
STM32U575xx
Ultra-low-power Arm® Cortex®-M33 32-bit MCU+TrustZone®+FPU, 240 DMIPS, up to 2 MB Flash memory, 786 KB SRAM
Datasheet - production data
Features
Includes ST state-of-the-art patented technology
Ultra-low-power with FlexPowerControl
• 1.71 V to 3.6 V power supply • –40 °C to +85/125 °C temperature range • Low-power background autonomous mode
(LPBAM): autonomous peripherals with DMA, functional down to Stop 2 mode • VBAT mode: supply for RTC, 32 x 32-bit backup registers and 2-Kbyte backup SRAM • 160 nA Shutdown mode (24 wakeup pins) • 210 nA Standby mode (24 wakeup pins) • 440 nA Standby mode with RTC • 1.9 μA Stop 3 mode with 16-Kbyte SRAM • 4.3 µA Stop 3 mode with full SRAM • 4.0 µA Stop 2 mode with 16-Kbyte SRAM • 8.95 µA Stop 2 mode with full SRAM • 19.5 μA/MHz Run mode @ 3.3 V
Core
• Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP, and FPU
ART Accelerator
• 8-Kbyte instruction cache allowing 0-wait-state execution from Flash and external memories: up to 160 MHz, 240 DMIPS
• 4-Kbyte data cache for external memories
Power management
• Embedded regulator (LDO) and SMPS step-down converter supporting switch on-the-fly and voltage scaling
Benchmarks
• 1.5 DMIPS/MHz (Drystone 2.1)
LQFP48 (7 x 7 mm) UFQFPN48 LQFP64 (10 x 10 mm) (7 x 7 mm) LQFP100 (14 x 14 mm) LQFP144 (20 x 20 mm)
WLCSP90 (4.2 x 3.95 mm)
UFBGA132 (7 x 7 mm) UFBGA169 (7 x 7 mm)
• 651 CoreMark® (4.07 CoreMark®/MHz) • 535 ULPMark™-CP • 149 ULPMark™-PP • 58.2 ULPMark™-CM • 133000 SecureMark™-TLS
Memories
• 2-Mbyte Flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles
• 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON
• External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories
• 2 Octo-SPI memory interfaces
Security
• Arm® TrustZone® and securable I/Os, memories and peripherals
• Flexible life cycle scheme with RDP and password protected debug
• Root of trust thanks to unique boot entry and secure hide protection area (HDP)
• Secure firmware installation (SFI) thanks to embedded root secure services (RSS)
• Secure firmware upgrade support with TF-M
• HASH hardware accelerator
• True random number generator, NIST SP800-90B compliant
• 96-bit unique ID
June 2022
This is information on a product in full production.
DS13737 Rev 6
1/329
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STM32U575xx
• 512-byte OTP (one-time programmable)
• Parallel synchronous slave interface
• Active tampers
Clock management
16- and 4-channel DMA controllers, functional in Stop mode
• 4 to 50 MHz crystal oscillator
Graphic features
• 32 kHz crystal oscillator for RTC (LSE) • Internal 16 MHz factory-trimmed RC (±1%) • Internal low-power 32 kHz RC (±5%)
• Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation
• 1 digital camera interface
• 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by LSE (better than ±0.25% accuracy)
• Internal 48 MHz with clock recovery • 3 PLLs for sy.