Document
STM32F469xx
Arm®Cortex®-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/384+4KB RAM, USB OTG HS/FS, Ethernet, FMC, dual Quad-SPI, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI
Datasheet - production data
Features
Core: Arm® 32-bit Cortex®-M4 CPU with FPU,
adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 180 MHz,
MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone
2.1), and DSP instructions
Memories
– Up to 2 MB of Flash memory organized into
two banks allowing read-while-write
– Up to 384+4 KB of SRAM including 64 KB of
CCM (core coupled memory) data RAM
– Flexible external memory controller with up
to 32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR, SDRAM, Flash
NOR/NAND memories
– Dual-flash mode Quad-SPI interface
Graphics
– Chrom-ART Accelerator™ (DMA2D),
graphical hardware accelerator enabling
enhanced graphical user interface with
minimum CPU load
– LCD parallel interface, 8080/6800 modes
– LCD TFT controller supporting up to XGA
– MreIsPoIl®utDioSnI host controller supporting up to
720p 30 Hz resolution
Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC
(1% accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
Low power
– Sleep, Stop and Standby modes
–
VreBgAiTstseurspp+lyopfotiroRnaTlC4,
20×32 bit backup KB backup SRAM
3× 12-bit, 2.4 MSPS ADC: up to 24 channels and
7.2 MSPS in triple interleaved mode
2× 12-bit D/A converters
General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
Up to 17 timers: up to twelve 16-bit and two
32-bit timers up to 180 MHz, each with up to four
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input. 2x watchdogs and
SysTick timer
LQFP100 (14 × 14 mm) LQFP144 (20 × 20 mm) LQFP176 (24 × 24 mm)
UFBGA169 (7 × 7 mm) WLCSP168 UFBGA176 (10 x 10 mm)
LQFP208 (28 × 28 mm)
TFBGA216 (13 x 13 mm)
Debug mode
– –
SCWortDexa®n-dMJ4TTArGacientMerafaccroecsell™
Up to 161 I/O ports with interrupt capability
– Up to 157 fast I/Os up to 90 MHz
– Up to 159 5 V-tolerant I/Os
Up to 21 communication interfaces – Up to three I2C interfaces (SMBus/PMBus)
– Up to four USARTs and four UARTs
(11.25 Mbit/s, ISO7816 interface, LIN, IrDA,
modem control)
–
Ufupll-tdouspilxexSIP2ISs
(45 Mbits/s), two with muxed for audio class accuracy via
internal audio PLL or external clock
– 1x SAI (serial audio interface)
– 2× CAN (2.0B Active)
– SDIO interface
Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– Dedicated USB power rail enabling on-chip
PHYs operation throughout the entire MCU
power supply range
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
8- to 14-bit parallel camera interface up to
54 Mbytes/s
True random number generator
CRC calculation unit
RTC: subsecond accuracy, hardware calendar
96-bit unique ID
Table 1. Device summary
Reference
Part numbers
STM32F469AE, STM32F469AG, STM32F469AI
STM32F469BE, STM32F469BG, STM32F469BI
STM32F469xx
STM32F469IE, STM32F469IG, STM32F469II STM32F469NE, STM32F469NG, STM32F469NI
STM32F469VE, STM32469VG, STM32469VI
STM32F469ZE, STM32469ZG, STM32469ZI
May 2021
This is information on a product in full production.
DS11189 Rev 7
1/220
www.st.com
Contents
Contents
STM32F469xx
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.1 Compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.1.1 LQFP176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1.1.2 LQFP208 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.1.3 UFBGA176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.1.4 TFBGA216 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.1 Arm® Cortex®-M4 with FPU and embedded Flash and SRAM . . . . . . . . 21
2.2 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 21
2.3 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.4 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.5 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 22
2.6 Embedded SRAM . . . . . .