Document
Isolated High Current IGBT/MOSFET Gate Driver
NCx57090y, NCx57091y
(x = D or V, y = A, B, C, D, E or F)
NCx57090y, NCx57091y are high−current single channel IGBT/MOSFET gate drivers with 5 kVrms internal galvanic isolation, designed for high system efficiency and reliability in high power applications. The devices accept complementary inputs and depending on the pin configuration, offer options such as Active Miller Clamp (version A/D/F), negative power supply (version B) and separate high and low (OUTH and OUTL) driver outputs (version C/E) for system design convenience. The driver accommodate wide range of input bias voltage and signal levels from 3.3 V to 20 V and they are available in wide−body SOIC−8 package.
Features
• High Peak Output Current (+6.5 A/−6.5 A) • Low Clamp Voltage Drop Eliminates the Need of Negative Power
Supply to Prevent Spurious Gate Turn−on (Version A/D/F)
• Short Propagation Delays with Accurate Matching • IGBT/MOSFET Gate Clamping during Short Circuit • IGBT/MOSFET Gate Active Pull Down • Tight UVLO Thresholds for Bias Flexibility • Wide Bias Voltage Range including Negative VEE2 (Version B) • 3.3 V, 5 V, and 15 V Logic Input • 5 kVrms Galvanic Isolation • High Transient Immunity • High Electromagnetic Immunity • NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Motor Control • Uninterruptible Power Supplies (UPS) • Automotive Applications • Industrial Power Supplies • Solar Inverters
DATA SHEET www.onsemi.com
SOIC8 WB CASE 751EW
MARKING DIAGRAM 8
5709zy AWLYYWW
G
1
5709zy
A WL YY WW G
= Specific Device Code z = 0/1 y = A/B/C/D/E/F = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package
PIN CONNECTIONS
See detailed pin connection information on page 2 of this data sheet.
ORDERING INFORMATION
See detailed ordering and shipping information on page 23 of this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
June, 2022 − Rev. 2
Publication Order Number: NCD57090A/D
VDD1 IN+ IN−
GND1
GND2 CLAMP OUT VDD2
NCx57090A, NCx57091A
VDD1 IN+ IN−
GND1
NCx57090D
NOTE: x = D or V
CLAMP OUT
VDD2 GND2
NCx57090y, NCx57091y
PIN CONNECTIONS
VDD1 IN+
IN− GND1
VEE2 GND2 OUT
VDD2
NCx57090B, NCx57091B
VDD1 IN+ IN−
GND1
NCx57090E
OUTL OUTH VDD2 GND2
Figure 1. Pin Connections
VDD1 IN+ IN−
GND1
GND2 OUTL OUTH VDD2
NCx57090C, NCx57091C
VDD1 IN+ IN−
GND1
NCx57090F
VDD2 OUT CLAMP
GND2
BLOCK DIAGRAM AND APPLICATION SCHEMATIC − VERSION A/D/F
VDD1 IN−
VDD1 UVLO1
VDD2 UVLO2
VDD2 OUT
IN+
GND1 1
Logic
Logic
2
+ VCLAMP−THR
−
CLAMP
Figure 2. Simplified Block Diagram, NCD57090A/D/F
GND2 2
VDD1
VDD1
IN+
VDD2
VDD2
OUT
IN−
CLAMP
GND1
GND2
Figure 3. Simplified Application Schematics, Version A/D/F
www.onsemi.com 2
NCx57090y, NCx57091y
BLOCK DIAGRAM AND APPLICATION SCHEMATIC − NCx57090B, NCx57091B.