QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SN74AHCT00QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE
D Qualified for Automotive Applications D Inputs Are TTL-Voltage Co...
Description
SN74AHCT00QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATE
D Qualified for Automotive Applications D Inputs Are TTL-Voltage Compatible D EPIC (Enhanced-Performance Implanted
CMOS) Process
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
description
SGDS007B − MAY 1998 − REVISED APRIL 2008
D OR PW PACKAGE (TOP VIEW)
1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7
14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y
The SN74AHCT00Q performs the Boolean function Y = A B or Y = A + B in positive logic.
ORDERING INFORMATION{
TA
PACKAGE‡
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SOIC − D −40°C to 125°C
TSSOP − PW
Tape and reel Tape and reel
SN74AHCT00QDRQ1 SN74AHCT00QPWRQ1
AHCT00Q HB00Q
† For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE (each gate)
INPUTS
A
B
OUTPUT Y
H
H
L
L
X
H
X
L
H
logic symbol†
1
1A
&
2
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
3 1Y
6 2Y
8 3Y
11 4Y
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