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TLV1548-Q1 Dataheets PDF



Part Number TLV1548-Q1
Manufacturers Texas Instruments
Logo Texas Instruments
Description Low-Voltage 10-Bit Analog-to-Digital Converter
Datasheet TLV1548-Q1 DatasheetTLV1548-Q1 Datasheet (PDF)

ą TLV1548ĆQ1 LOWĆVOLTAGE 10ĆBIT ANALOGĆTOĆDIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS SGLS172B − JUNE 2003 − REVISED APRIL 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D Conversion Time ≤ 10 µs D 10-Bit-Resolution ADC D Programmable Power-Down Mode . . . 1 µA D Wide Range Single-Supply Operation of 2.7 V dc to 5.5 V dc D Analog Input Range of 0 V to VCC D Built-i.

  TLV1548-Q1   TLV1548-Q1



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ą TLV1548ĆQ1 LOWĆVOLTAGE 10ĆBIT ANALOGĆTOĆDIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS SGLS172B − JUNE 2003 − REVISED APRIL 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D Conversion Time ≤ 10 µs D 10-Bit-Resolution ADC D Programmable Power-Down Mode . . . 1 µA D Wide Range Single-Supply Operation of 2.7 V dc to 5.5 V dc D Analog Input Range of 0 V to VCC D Built-in Analog Multiplexer with 8 Analog Input Channels D TMS320 DSP and Microprocessor SPI and QSPI Compatible Serial Interfaces D End-of-Conversion (EOC) Flag D Inherent Sample-and-Hold Function D Built-In Self-Test Modes D Programmable Power and Conversion Rate D Asynchronous Start of Conversion for Extended Sampling D Hardware I/O Clock Phase Adjust Input A0 A1 A2 A3 A4 A5 A6 A7 CSTART GND DB PACKAGE (TOP VIEW) 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC EOC I/O CLK DATA IN DATA OUT CS REF+ REF− FS INV CLK description The TLV1548 is a CMOS 10-bit switched-capacitor successive-approximation (SAR) analog-to-digital (A/D) converter. The device has a chip select (CS), input-output clock (I/O CLK), data input (DATA IN) and serial data output (DATA OUT) that provides a direct 4-wire synchronous serial peripheral interface (SPI, QSPI) port of a host microprocessor. When interfacing with a TMS320 DSP, an additional frame sync signal (FS) indicates the start of a serial data frame. The device allows high-speed data transfers from the host. The INV CLK input provides further timing flexibility for the serial interface. In addition to a high-speed converter and versatile control capability, the device has an on-chip 11-channel multiplexer that can select any one of eight analog inputs or any one of three internal self-test voltages. The sample-and-hold function is automatic except for the extended sampling cycle, where the sampling cycle is started by the falling edge of asynchronous CSTART. At the end of the A/D conversion, the end-of-conversion (EOC) output goes high to indicate that the conversion is complete. The TLV1548 is designed to operate with a wide range of supply voltages with very low power consumption. The power saving feature is further enhanced with a software-programmed power-down mode and conversion rate. The converter incorporated in the device features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating temperature range. The TLV1548 has eight analog input channels. The TLV1548Q is characterized for operation over the full automotive temperature range of −40°C to 125°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SPI and QSPI are registered trademarks of Motorola, Inc. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2008 Texas Instruments Incorporated • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1 TLV1548ĆQ1 ą LOWĆVOLTAGE 10ĆBIT ANALOGĆTOĆDIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS SGLS172B − JUNE 2003 − REVISED APRIL 2008 functional block diagram A0−A7 1−8 REF+ 14 Self-Test Reference Sample and Hold Function CLOCK 10-Bit ADC (Switch Capacitors) Analog MUX Output Data Register 10-to-1 Data Selector 16 DATA OUT 13 REF− 17 DATA IN Input Data Register Control Logic and I/O Counters 19 EOC 12 FS 15 CS 9 CSTART 11 INV CLK 18 I/O CLK Terminals shown are for the DB package. ORDERING INFORMATION{ TA PACKAGE} ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 125°C SSOP − DB Tape and reel TLV1548QDBRQ1 1548Q1 † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging. 2 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 ą TLV1548ĆQ1 LOWĆVOLTAGE 10ĆBIT ANALOGĆTOĆDIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS SGLS172B − JUNE 2003 − REVISED APRIL 2008 Terminal Functions TERMINAL NAME NO. A0−A3 1−4 A4−A7 5−8 CS 15 CSTART 9 DATA IN 17 DATA OUT 16 EOC 19 FS 12 GND 10 INV CLK 11 I/O DESCRIPTION I Analog inputs. The analog inputs are internally multiplexed. (For a source impedance greater than 1 kΩ, the asynchronous start should be used to increase the sampling time.) I Chip select. A high-to-.


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