TLV1562

TLV1562 2.7 V TO 5.5 V, HIGH-SPEED LOW-POWER RECONFIGURABLE ANALOG-TO-DIGITAL CONVERTER WITH 4-INPUT, DUAL S/H, PARALLEL INTERFACE, AND POWER DOWN SLAS162 – SEPTEMBER 1998 D 2 MSPS Max Throughput at 10 Bit (Single Channel), ±1 LSB DNL, ±1 LSB INL MAX D 3 MSPS Max Throughput at 8 Bit (Single Channel), ±1 LSB DNL, ±1 LSB INL MAX D 7 MSPS Max Throughput at 4 Bit (Single Channel), ±0.4 LSB DNL, ±0.4 LSB INL MAX D No Missing Code for External Clock Up to 15 MHz at 5.5 V, 12 MHz at 2.7 V D ENOB 9.4 Bit, SINAD 57.8 dB, SFDR –70.8 dB, THD –68.8 dB, at fi = 800 kHz, 10 Bit D Wide Input Bandwidth for Undersampling (75 MHz at 1 dB, >120 MHz at –3 dB) at Rs = 1 kΩ D Software Programmable Power Down, (1 µA), Auto Powerdown (120 µA) D Single Wide Range Supply 2.7 VDC to 5.5 VDC D Low Supply Current 11 mA at 5.5 V, 10 MHz; 7 mA at 2.7 V, 8 MHz Operating D Simultaneous Sample and Hold: Dual Sample and Hold Matched Channels Multi Chip Simultaneous Sample and Hold Capable D Programmable Conversion Modes: Interrupt-Driven for Shorter Latency Continuous Modes Optimized for MIPS Sensitive DSP Solutions D Built-In Internal/System Mid-Scale Error Calibration D Built-In Mux With 2 Differential or 4 Single-Ended Input Channels D Low Input Capacitance (10 pF Max Fixed, 1 pF Max Switching) D DSP/µ P-Compatible Parallel Interface applications D Portable Digital Radios D Personal Communication Assistants D Cellular D Pager D Scanner D Digitizers D Process Controls D Motor Control D Remote Sensing D Aut...