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TLV5510 Dataheets PDF



Part Number TLV5510
Manufacturers Texas Instruments
Logo Texas Instruments
Description 2.7-V TO 3.6-V 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER
Datasheet TLV5510 DatasheetTLV5510 Datasheet (PDF)

TLV5510 2.7-V TO 3.6-V 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS124C– DECEMBER 1997 – REVISED DECEMBER 1999 D 8-Bit Resolution D Integral Linearity Error ± 0.75 LSB Max (25°C) ± 1 LSB Max (– 35°C to 85°C) D Differential Linearity Error ± 0.5 LSB (25°C) ± 0.75 LSB Max (– 35°C to 85°C) D Maximum Conversion Rate 10 Mega-Samples per Second (MSPS) Min D 2.7-V to 3.6-V Single-Supply Operation D Low Power Consumption . . . 42 mW Typ at 3V D Low Voltage Replacement for CXD1175 Applications D C.

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TLV5510 2.7-V TO 3.6-V 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS124C– DECEMBER 1997 – REVISED DECEMBER 1999 D 8-Bit Resolution D Integral Linearity Error ± 0.75 LSB Max (25°C) ± 1 LSB Max (– 35°C to 85°C) D Differential Linearity Error ± 0.5 LSB (25°C) ± 0.75 LSB Max (– 35°C to 85°C) D Maximum Conversion Rate 10 Mega-Samples per Second (MSPS) Min D 2.7-V to 3.6-V Single-Supply Operation D Low Power Consumption . . . 42 mW Typ at 3V D Low Voltage Replacement for CXD1175 Applications D Communications D Digital Imaging D Video Conferencing D High-Speed Data Conversion PW OR NS PACKAGE† (TOP VIEW) OE 1 DGND 2 D1(LSB) 3 D2 4 D3 5 D4 6 D5 7 D6 8 D7 9 D8(MSB) 10 VDDD 11 CLK 12 24 DGND 23 REFB 22 REFBS 21 AGND 20 AGND 19 ANALOG IN 18 VDDA 17 REFT 16 REFTS 15 VDDA 14 VDDA 13 VDDD † Also available in tape and reel and ordered as the TLV5510INSR. AVAILABLE OPTIONS PACKAGE TA TSSOP (PW) SOP (NS) – 35°C to 85°C TLV5510IPW TLV5510INS description The TLV5510 is a CMOS 8-bit resolution semiflash analog-to-digital converter (ADC) with a 2.7-V to 3.6-V single power supply and an internal reference voltage source. It converts a wide band analog signal (such as a video signal) to a digital signal at a sampling rate of dc to 10 MHz. functional block diagram REFB REFT REFBS AGND AGND Resistor Reference Divider 200 Ω NOM 60 Ω NOM VDDA REFTS ANALOG IN 40 Ω NOM CLK Clock Generator OE Lower Sampling Comparators (4 Bit) Lower Sampling Comparators (4 Bit) Upper Sampling Comparators (4 Bit) Lower Encoder (4 Bit) Lower Encoder (4 Bit) Upper Encoder (4 Bit) Lower Data Latch Upper Data Latch D1(LSB) D2 D3 D4 D5 D6 D7 D8(MSB) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999, Texas Instruments Incorporated • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1 TLV5510 2.7-V TO 3.6-V 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS124C– DECEMBER 1997 – REVISED DECEMBER 1999 schematics of inputs and outputs EQUIVALENT OF ANALOG INPUT VDDA EQUIVALENT OF EACH DIGITAL INPUT VDDD EQUIVALENT OF EACH DIGITAL OUTPUT VDDD ANALOG IN OE, CLK D1 – D8 AGND DGND DGND Terminal Functions TERMINAL NAME NO. AGND 20, 21 ANALOG IN 19 CLK 12 DGND 2, 24 D1 – D8 3 – 10 OE 1 VDDA VDDD REFB 14, 15, 18 11, 13 23 REFBS 22 REFT 17 REFTS 16 I/O DESCRIPTION Analog ground I Analog input I Clock input Digital ground O Digital data out. D1:LSB, D8:MSB I Output enable. When OE = low, data is enabled. When OE = high, D1 – D8 is high impedance. Analog supply voltage Digital supply voltage I Reference voltage in (bottom) Reference voltage (bottom). When using the internal voltage divider to generate a nominal 2-V reference, this terminal is shorted to the REFB terminal and the REFTS terminal is shorted to the REFT terminal (see Figure 21). I Reference voltage in (top) Reference voltage (top). When using the internal voltage divider to generate a nominal 2-V reference, this terminal is shorted to the REFT terminal and the REFBS terminal is shorted to the REFB terminal (see Figure 21). absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDDA, VDDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Reference voltage input range, REFT, REFB, REFBS, REFTS . . . . . . . . . . . . . . . . . . . . . . . . . AGND to VDDA Analog input voltage range, VI(ANLG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND to VDDA Digital input voltage range, VI(DGTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to VDDD Digital output voltage range, VO(DGTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to VDDD Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 35°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device .


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