Document
www.ti.com
SN65LVDS348 , SN65LVDT348 SN65LVDS352, SN65LVDT352
SLLS523E – FEBRUARY 2002 – REVISED MAY 2004
QUAD HIGH-SPEED DIFFERENTIAL RECEIVERS
FEATURES
• Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard
• Single-Channel Signaling Rates up to 560 Mbps
• -4 V to 5 V Common-Mode Input Voltage Range
• Flow-Through Architecture • Active Failsafe Assures a High-level Output
When an Input Signal Is not Present
• SN65LVDS348 Provides a Wide CommonMode Range Replacement for the SN65LVDS048A or the DS90LV048A
APPLICATIONS
• Logic Level Translator • Point-to-Point Baseband Data Transmission
Over 100-Ω Media • ECL/PECL-to-LVTTL Conversion • Wireless Base Stations • Central Office or PABX Switches
DESCRIPTION
The
SN65LVDS348,
SN65LVDT348,
SN65LVDS352, and SN65LVDT352 are high-speed,
quadruple differential receivers with a wide
common-mode input voltage range. This allows
receipt of TIA/EIA-644 signals with up to 3-V of
ground noise or a variety of differential and
single-ended logic levels. The '348 is in a 16-pin
package to match the industry-standard footprint of
the DS90LV048. The '352 adds two additional VCC and GND pins in a 24-pin package to provide higher
data transfer rates with multiple receivers in
operation. All offer a flow-through architecture with all
inputs on one side and outputs on the other to ease
board layout and reduce crosstalk between
receivers. LVDT versions of both integrate a 110-Ω
line termination resistor.
These receivers also provide 3x the standard's minimum common-mode noise voltage tolerance. The -4 V to 5 V common-mode range allows usage in harsh operating environments or accepts LVPECL, PECL, LVECL, ECL, CMOS, and LVCMOS levels without level shifting circuitry. See the Application Information Section for more details on the ECL/PECL to LVDS interface.
DATA TRANSFER RATE vs
FREE-AIR TEMPERATURE 550
SN65LVDS352PW 500
450
LVDT Device Only
Timer
Data Transfer Rate - Mxfr/s
400
SN65LVDS348PW 350
300
250 215 -1 prbs NRZ, VID = 0.4 V VIC = 1.2 V, CL = 5.5 pF, 40% Open Eye 4 Receivers Switching, Input Jitter < 45 ps
200 -60 -40 -20 0 20 40 60 80 100 TA - Free-Air Temperature - °C
(One of Four Shown)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2002–2004, Texas Instruments Incorporated
SN65LVDS348 , SN65LVDT348 SN65LVDS352, SN65LVDT352
SLLS523E – FEBRUARY 2002 – REVISED MAY 2004
www.ti.com
DESCRIPTION (CONTINUED)
Precise control of the differential input voltage thresholds allows for inclusion of 50 mV of input-voltage hysteresis to improve noise rejection. The diffe.