Document
SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30
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SDAS010E – APRIL 1982 – REVISED OCTOBER 2012
8-INPUT POSITIVE-NAND GATES
Check for Samples: SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30
FEATURES
1
• 8-Input Positive-NAND Gates • Available in J, DW, N, and FK Packages
DESCRIPTION
These devices contain an 8-input positive-NAND gate and perform the following Boolean functions in positive logic:
Y = A • B •C • D • E • F • G • H
or
Y=A+B+C+D+E+F+G
SN54ALS30A, SN54AS30 . . . J PACKAGE SN74ALS30A, SN74AS30 . . . DW OR N PACKAGE
SN74AS30 . . . DB PACKAGE
(TOP VIEW)
A1 B2 C3 D4 E5 F6 GND 7
14 VCC 13 N.C. 12 H 11 G 10 N.C. 9 N.C. 8Y
SN54ALS30A, SN54AS30 . . . FK PACKAGE (TOP VIEW)
B A N.C. VCC N.C.
C N.C.
D N.C.
E
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
H N.C. G N.C. N.C.
F GND N.C.
Y N.C.
N.C. – No internal connection
TA PDIP – N
0°C to 70°C
SOIC – D
SSOP – DB
–55°C to 125°C
CDIP – J LCCC –FK
ORDERING INFORMATION
PACKAGE(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
Tube
SN74ALS30AN SN74AS30N
SN74ALS30AN SN74AS30N
Tube Tape and reel
SN74AS30AD SN74ALS30ADR
ALS30A
Tube Tape and reel
SN74AS30D SN74AS30DR
AS30
Tape and reel
SN74AS30DBR
AS30
Tube
SNJ54ALS30AJ SNJ54AS30J
SNJ54ALS30AJ SNJ54AS30J
Tube
SNJ54ALS30AFK SNJ54AS30FK
SNJ54ALS30AFK SNJ54AS30FK
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1982–2012, Texas Instruments Incorporated
SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30
SDAS010E – APRIL 1982 – REVISED OCTOBER 2012
Table 1. FUNCTION TABLE
INPUTS A–H
All inputs H
One or more inputs L
OUTPUT Y
L
H
1
A
2
B
3
C
4
D
5
E
6
F
11
G
12
H
LOGIC SYMBOL
8
Y
A. This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin number shown are for the D, DB, J, and N packages.
LOGIC DIAGRAM (POSITIVE LOGIC)
1
A
2
B
3
C
4
D
5
E
6
F
11
G
12
H
8
Y
Pin number shown are for the D, DB, J, and N packages.
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ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
VCC Supply voltage range
VI
Input voltage range
θJA
Package thermal impedance(2)
D package DB package N package
–0.5
7V
–0.5
7V
86
96 °C/W
80
Tstg Storage temperature range
–65
150 °C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause perman.