SN74AUP1T17

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design SN74AUP1T17 SCES803A – APRIL 2010 – REVISED JUNE 2015 SN74AUP1T17 Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output, Single Schmitt-Trigger Buffer Gate 1 Features 1 Single-Supply Voltage Translator Output Level Up to Supply VCC CMOS Level – 1.8 V to 3.3 V (at VCC = 3.3 V) – 2.5 V to 3.3 V (at VCC = 3.3 V) – 1.8 V to 2.5 V (at VCC = 2.5 V) – 3.3 V to 2.5 V (at VCC = 2.5 V Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity Ioff Supports Partial Power Down (VCC = 0 V) Very Low Static Power Consumption: 0.1 µA Very Low Dynamic Power Consumption: 0.9 µA Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II Pb-Free Packages Available: SC-70 (DCK) 2 x 2.1 x 0.65 mm (Height 1.1 mm) More Gate Options Available at www.ti.com/littlelogic ESD Performance Tested Per JESD 22 – 2000-V Human Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) 2 Applications AV Receivers Audio Dock: Portable Blu-ray Players and Home Theaters MP3 Players and Recorders Personal Digital Assistant (PDA) Power: Telecom/Server AC/DC Supply: Single Controller: Analog and Digital Solid State Drive (SSD): Client and Enterprise TV: LCD/Digital and High-Definition (HDTV) Tablet: Enterprise Video Analytics: Servers Wireless Headsets, Keyboards, and Mice 3 Description The SN74AUP1T17 performs the Boolean function Y = A wi...