SN74AUP2G08

SN74AUP2G08 www.ti.com SCES681D – JANUARY 2008 – REVISED OCTOBER 2010 LOW-POWER DUAL 2-INPUT POSITIVE-AND GATE Check for Samples: SN74AUP2G08 FEATURES 1 Available in the Texas Instruments NanoStar™ Package Low Static-Power Consumption (ICC = 0.9 mA Max) Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V) Low Input Capacitance (Ci = 1.5 pF Typ) Low Noise – Overshoot and Undershoot <10% of VCC Ioff Supports Partial-Power-Down Mode Operation Schmitt-Trigger Action Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typ at 3.3 V) 1A 1B 2Y GND DCU PACKAGE (TOP VIEW) 1 8 2 7 3 6 4 5 VCC 1Y 2B 2A DQE PACKAGE (TOP VIEW) 1A 1 1B 2 2Y 3 GND 4 V 8 CC 7 1Y 6 2B 5 2A Wide Operating VCC Range of 0.8 V to 3.6 V Optimized for 3.3-V Operation 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation tpd = 5.9 ns Max at 3.3 V Suitable for Point-to-Point Applications Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) RSE PACKAGE (TOP VIEW) VCC 1Y 1 8 7 1A 2B 2 6 1B YFP OR YZP PACKAGE (TOP VIEW) 1A 1B 2Y GND A1 1 8 A2 B1 2 7 B2 C1 3 6 C2 D1 4 5 D2 V CC 1Y 2B 2A See mechanical drawings for dimensions. 2A 3 4 5 2Y GND DESCRIPTION/ORDERING INFORMATION The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This ...