SN74AUP2G80

SN74AUP2G80 www.ti.com SCES756A – DECEMBER 2009 – REVISED MARCH 2010 LOW-POWER DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP Check for Samples: SN74AUP2G80 FEATURES 1 Available in the Texas Instruments NanoStar™ Package Low Static-Power Consumption (ICC = 0.9 mA Maximum) Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V) Low Input Capacitance (Ci = 1.5 pF Typical) Low Noise – Overshoot and Undershoot <10% of VCC Ioff Supports Partial-Power-Down Mode Operation Wide Operating VCC Range of 0.8 V to 3.6 V Optimized for 3.3-V Operation 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation tpd = 4.4 ns Maximum at 3.3 V Suitable for Point-to-Point Applications Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) 1CLK 1D 2Q GND DCU PACKAGE (TOP VIEW) 1 8 2 7 3 6 4 5 DQE PACKAGE (TOP VIEW) V CC 1CLK 1 1Q 1D 2 2Q 3 2D GND 4 2CLK V 8 CC 7 1Q 6 2D 5 2CLK RSE PACKAGE YFP PACKAGE (TOP VIEW) (TOP VIEW) 1Q 1 V CC 8 1CLK V A1 1 8 A2 CC 1D 1Q B1 2 7 B2 7 1CLK 2Q 2D C1 3 6 C2 2D 2 6 1D GND D1 4 5 D2 2CLK See mechanical drawings for dimensions. 2CLK 3 4 5 2Q GND DESCRIPTION/ORDERING INFORMATION The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC ...