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SN65DPHY440SS, SN75DPHY440SS
SLLSEO9C – MARCH 2016 – REVISED AUGUST 2019
SNx5DPHY440SS CSI-2/DSI DPHY Re-timer
1 Features
•1 MIPI DPHY 1.1 Specification compliant • Enables low-cost cable solutions • Supports up to 4 lanes at 1.5 Gbps
– CSI-2/DSI Clock rates from 100 MHz To 750 MHz
• Sub mW Power in shutdown state • MIPI DSI Bi-directional LP mode supported • Supports for both ULPS and LP power states • Adjustable output voltage swing • Selectable TX Pre-emphasis levels • Adjustable Rx EQ to compensate for ISI loss • Configurable edge rate control • Dynamic data and clock skew compensation • 3-kV ESD HBM protection • Industrial temperature range: –40°C to 85°C
(SN65DPHY440SS) • Commercial temperature range: 0°C to 70°C
(SN75DPHY440SS) • Available in single 1.8-Vlpply
2 Applications
• Notebook PC • Clam lhell • Tablets • Camera
Camera (CSI-2 Source)
CSI TX CSI0P/N CSI1P/N CSICP/N CSI2P/N CSI3P/N
CSI Slave SCL
SDA
VSADJ_CFG0 PRE_CFG1 ERC EQ
Simplified Schematic
DPHY440
DA0P/N DA1P/N DACP/N DA2P/N DA3P/N
DB0P/N DB1P/N DBCP/N DB2P/N DB3P/N
Vio
APU (CSI-2 Sink)
CSI RX CSI0P/N CSI1P/N CSICP/N CSI2P/N CSI3P/N
CSI Master SCL
SDA
3 Description
The DPHY440 is a one to four lane and clock MIPI DPHY re-timer that regenerates the DPHY signaling. The device complies with MIPI DPHY 1.1 standard and can be used in either a MIPI CSI-2 or MIPI DSI application at datarates of up to 1.5 Gbps.
The device compensates for PCB, connector, and cable related frequency loss and switching related loss to provide the optimum electrical performance from a CSI2/DSI source to sink. The DPHY440’s DPHY inputs feature configurable equalizers.
The output pins automatically compensate for uneven skew between clock and data lanes received on its inputs ports. The DPHY440 output voltage swing and edge rate can be adjusted by changing the state of the VSADJ_CFG0 pin and ERC pin respectively.
The DPHY440 is optimized for mobile applications, and contains activity detection circuitry on the DPHY Link interface that can transition into a lower power mode when in ULPS and LP states.
The SN65DPHY440SS is characterized for an industrial temperature range from -40ºC to 85ºC while SN75DPHY440SS is characterized for commercial temperature range from 0ºC to 70ºC.
Device Information (1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN65DPHY440SS SN75DPHY440SS
WQFN (28)
3.50 mm x 5.50 mm
(1) For all available packages, see the orderable addendum at the end of the datasheet.
Typical Application
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN65DPHY440SS, SN75DPHY440SS
SLLSEO9C – MARCH 2016 – REVISED AUGUST 2019
www.ti.com
Table of Contents
1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Pin Configuration and Functions ......................... 4 6 Specifications......................................................... 6
6.1 Absolute Maximum Ratings ...................................... 6 6.2 ESD Ratings.............................................................. 6 6.3 Recommended Operating Conditions....................... 6 6.4 Thermal Information .................................................. 6 6.5 Electrical Characteristics, Power Supply ................. 7 6.6 Electrical Characteristics........................................... 7 6.7 Timing Requirements ................................................ 8 6.8 Switching Characteristics .......................................... 9 6.9 Typical Characteristics ............................................ 10 7 Detailed Description ............................................ 11 7.1 Overview ................................................................. 11 7.2 Functional Block Diagram ....................................... 11
7.3 Feature Description................................................. 12 7.4 Device Functional Modes........................................ 14 7.5 Register Maps ......................................................... 15 8 Application and Implementation ........................ 21 8.1 Application Information, ......................................... 21 8.2 Typical Application, CSI-2 Implementations ........... 21 9 Power Supply Recommendations...................... 25 10 Layout................................................................... 26 10.1 Layout Guidelines ................................................. 26 10.2 Layout Example ....