SN65ELT21

SN65ELT21 www.ti.com....................................................................................................................................................................................................... SLLS923 – JUNE 2009 5-V PECL-to-TTL Translator FEATURES 1 3ns (TYP) Propagation Delay Operating Range: VCC = 4.2 V to 5.7 V with GND = 0 V 24-mA TTL Output Deterministic Output Value for Open Input Conditions or When Inputs < 1.3 V Built-In Temperature Compensation Drop-In Compatible to the MC10ELT21, MC100ELT21 APPLICATIONS Data and Clock Transmission Over Backplane Signaling Level Conversion for Clock or Data PIN ASSIGNMENT D or DGK PACKAGE (TOP VIEW) NC 1 8 VCC D2 7Q D3 VBB 4 6 NC 5 GND DESCRIPTION The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V. The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used. PIN D, D Q VCC VEE VBB Table 1. Pin Descriptions FUNCTION PECL data inputs TTL output Positive supply Negative supply Reference voltage outp...