SN65ELT22

SN65ELT22 www.ti.com............................................................................................................................................................................................ SLLS924 – DECEMBER 2008 5-V Dual TTL-to-Differential PECL Translator FEATURES 1 1.1-ns (max) Propagation Delay Operating Range: VCC = 4.2V to 5.7V with GND = 0 V < 50-ps (typ) Output-to-Output Skew Built-In Temperature Compensation Drop-In Compatible to the MC10ELT22, MC100ELT22 APPLICATIONS Data and Clock Transmission Over Backplane Signaling Level Conversion for Clock or Data PIN ASSIGNMENT D or DGK PACKAGE (TOP VIEW) Q0 1 8 VCC Q0 2 7 D0 Q1 3 6 D1 DESCRIPTION Q1 4 5 The SN65ELT22 is a dual TTL-to-differential PECL translator. It operates on +5-V supply and ground only. The output is undetermined when the inputs are left floating. The low output skew makes the device Table 1. Pin Descriptions an ideal solution for clock or data signal translation. PIN FUNCTION The SN65ELT22 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. D0, D1 Q0, Q0, Q1, Q1 VCC TTL inputs PECL outputs Positive supply GND Ground ORDERING INFORMATION(1) GND PART NUMBER SN65ELT22D SN65ELT22DGK PART MARKING SN65ELT22 SN65ELT22 PACKAGE SOIC SOIC-TSSOP LEAD FINISH NiPdAu NiPdAu (1) Leaded device options are not initially available; contact a sales representative for further details 1 Please be aware that an...