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SN65ELT23 Dataheets PDF



Part Number SN65ELT23
Manufacturers Texas Instruments
Logo Texas Instruments
Description 5-V Dual Differential PECL Buffer-to-TTL Translator
Datasheet SN65ELT23 DatasheetSN65ELT23 Datasheet (PDF)

SN65ELT23 www.ti.com.... SLLS925 – JUNE 2009 5-V Dual Differential PECL Buffer-to-TTL Translator FEATURES 1 • Dual 5-V Differential PECL-to-TTL Buffer • 24-mA TTL Ouputs • Operating Range – PECL VCC = 4.75 V to 5.25 V with GND = 0 V • Support for Clock Frequencies of 250 MHz (TYP) • 3.5-ns Typical Prop.

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SN65ELT23 www.ti.com....................................................................................................................................................................................................... SLLS925 – JUNE 2009 5-V Dual Differential PECL Buffer-to-TTL Translator FEATURES 1 • Dual 5-V Differential PECL-to-TTL Buffer • 24-mA TTL Ouputs • Operating Range – PECL VCC = 4.75 V to 5.25 V with GND = 0 V • Support for Clock Frequencies of 250 MHz (TYP) • 3.5-ns Typical Propagation Delay • Output Default Low with Inputs Left Open or <1.3 V • Internal Input 50-kΩ Pull-Down Resistor • Built-In Temperature Compensation • Drop-In Compatible to the MC100ELT23 PIN ASSIGNMENT D or DGK PACKAGE (TOP VIEW) D0 1 D0 2 D1 3 PECL D1 4 8 VCC 7 Q0 TTL 6 Q1 5 GND APPLICATIONS • Data and Clock Transmission Over Backplane • Signaling Level Conversion for Clock or Data Table 1. Pin Descriptions PIN D0, D0, D1, D1 Q0, Q1 PECL inputs TTL outputs FUNCTION DESCRIPTION VCC Positive supply GND The SN65ELT23 is a low power dual PECL-to-TTL Ground translator device. The device includes circuitry to maintain a known logic low level when inputs are in an open condition. The SN65ELT23 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package. ORDERING INFORMATION(1)(2) PART NUMBER SN65ELT23D SN65ELT23DGK PART MARKING ELT23 SIKI PACKAGE SOIC MSOP LEAD FINISH NiPdAu NiPdAu (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Leaded device options are not initially available; contact a sales representative for further details. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated SN65ELT23 SLLS925 – JUNE 2009....................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS(1) PARAMETER Absolute supply voltage, VCC Absolute input voltage, VI Output current Operating temperature range Storage temperature range CONDITIONS GND = 0 and VI ≤ VCC Continuous Surge VALUE 6 0 to 6 50 100 –40 to 85 –65 to 150 UNIT V V mA °C °C (1) Stresses beyond those listed under ab.


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