FDG313N
FDG313N
Digital FET, N-Channel
General Description
This N-Channel enhancement mode field effect transistor is p...
FDG313N
FDG313N
Digital FET, N-Channel
General Description
This N-Channel enhancement mode field effect
transistor is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital
transistor and small signal MOSFET.
Applications Load switch Battery protection Power management
Features
0.95 A, 25 V. RDS(on) = 0.45 Ω @ VGS = 4.5 V
RDS(on) = 0.60 Ω @ VGS = 2.7 V.
Low gate charge (1.64 nC typical)
Very low level gate drive requirements allowing direct
operation in 3V circuits (VGS(th) < 1.5V).
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
Compact industry standard SC70-6 surface mount
package.
S
D
1
D
2
G
pin 1
SC70-6
D D
3
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
Parameter
VDSS VGSS ID
PD
Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous
- Pulsed Power Dissipation for Single Operation
(Note 1a)
(Note 1a) (Note 1b)
(Note 1c)
TJ, Tstg ESD
Operating and Storage Junction Temperature Range
Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100pf / 1500 Ohm)
6
5
4
FDG313N
25 ±8 0.95 2 0.75 0.55 0.48 -55 to +150 6
Units
V V A
W
°C kV
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
260
°C/W
Package Outlines and Ordering Information
Device ...