STM32H7B0AB

STM32H7B0xB Datasheet 32-bit Arm® Cortex®-M7 280 MHz MCUs, 128-Kbyte Flash memory, 1.4-Mbyte RAM, 46 com. and analog interfaces, SMPS, crypto FBGA LQFP64 (10 x 10 mm) LQFP100 (14 x 14 mm) LQFP144 (20x20 mm) LQFP176 (24 x 24 mm) UFBGA169 (7 x 7 mm) UFBGA176+25 (10x10 mm) Product summary STM32H7B0xB STM32H7B0AB, STM32H7B0IB, STM32H7B0RB, STM32H7B0ZB, STM32H7B0VB Features Includes ST state-of-the-art patented technology Core 32-bit Arm® Cortex®-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache allowing to fill one cache line in a single access from the 128-bit embedded flash memory; frequency up to 280 MHz, MPU, 599 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions Memories 128 Kbytes of flash memory plus 1 Kbyte of OTP memory ~1.4 Mbytes of RAM: 192 Kbytes of TCM RAM (inc. 64 Kbytes of ITCM RAM + 128 Kbytes of DTCM RAM for time critical routines), 1.18 Mbytes of user SRAM, and 4 Kbytes of SRAM in Backup domain 2x Octo-SPI memory interfaces with on-the-fly decryption, I/O multiplexing and support for serial PSRAM/NOR, Hyper RAM/flash frame formats, running up to 140 MHz in SRD mode and up to 110 MHz in DTR mode Flexible external memory controller with up to 32-bit data bus: – SRAM, PSRAM, NOR flash memory clocked up to 125 MHz in Synchronous mode – SDRAM/LPSDR SDRAM – 8/16-bit NAND flash memories CRC calculation unit Security ROP, PC-ROP, active tamper, secure firmware upgrade support, Secure acces...