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L6983I Dataheets PDF



Part Number L6983I
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description 10W synchronous iso-buck converter
Datasheet L6983I DatasheetL6983I Datasheet (PDF)

L6983I Datasheet 38 V, 10 W synchronous iso-buck converter for isolated applications QFN16 (3 x 3 mm) Maturity status link L6983I Features • Designed for iso-buck topology • 3.5 V to 38 V operating input voltage • Primary output voltage regulation / no optocoupler required • 4.5 A source / sink peak primary current capability • Peak current mode architecture in forced PWM operation • 390 ns blanking time • 200 kHz to 1 MHz programmable switching frequency. Stable with low ESR capacitor: min 2 .

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L6983I Datasheet 38 V, 10 W synchronous iso-buck converter for isolated applications QFN16 (3 x 3 mm) Maturity status link L6983I Features • Designed for iso-buck topology • 3.5 V to 38 V operating input voltage • Primary output voltage regulation / no optocoupler required • 4.5 A source / sink peak primary current capability • Peak current mode architecture in forced PWM operation • 390 ns blanking time • 200 kHz to 1 MHz programmable switching frequency. Stable with low ESR capacitor: min 2 µF • Internal compensation network • 2 μA shutdown current • Internal soft-start • Enable • Overvoltage protection • Output voltage sequencing • Thermal protection • Optional spread spectrum for improved EMC • Power Good • Synchronization to external clock • QFN16 (3x3 mm) package Applications • Isolated IGBT/SiC MOSFET gate drive supply • OBC (On-board charger) for HEV/EV • Electric traction systems Description The L6983I is a device specifically designed for isolated buck topology. The primary output voltage can be accurately adjusted, whereas the isolated secondary output is derived by using a given transformer ratio. No optocoupler is required. The primary sink capability up to -4.5 A (even during soft-start) allows a proper energy transfer to the secondary side as well as enabling a tracked soft-start of the secondary output. The control loop is based on a peak current mode architecture and the device operates in forced PWM. The 390 ns blanking time filters oscillations, generated by the transformer leakage inductance, making the solution more robust. The compact QFN16 3x3 mm package and the internal compensation of the L6983I help minimize design complexity and size. The switching frequency can be programmed in the 200 kHz - 1 MHz range with optional spread spectrum for improved EMC. The EN pin provides enable/disable functionality. The typical shutdown current is 2 μA when disabled. As soon as the EN pin is pulled up the device is enabled and the internal 1.3 ms soft-start takes place. The L6983I features Power Good open collector that monitors the FB voltage. Pulse by pulse current sensing on both power elements implements an effective constant current protection and thermal shutdown prevents thermal run-away. DS14040 - Rev 1 - October 2022 For further information contact your local STMicroelectronics sales office. www.st.com 1 Pin configuration Figure 1. Pin connection (top view) L6983I Pin configuration PGND SW SW PGND 16 15 14 13 VIN 1 12 VIN VINLDO 2 11 BOOT AGND 3 E.P. 10 AGND EN/CLKIN(*) 4 9 VCC 5 6 7 8 PGOOD VBIAS FB FSW Pin n° 1 2 3 4 5 6 7 8 9 10 Symbol VIN VINLDO AGND EN / CLKIN PGOOD VBIAS FB FSW VCC AGND Table 1. Pin description Function DC input voltage DC input voltage connects to the supply rail with a simple RC filter. Analog ground Enable pin with internal voltage divider. Pull down/up to disable/ enable the device. This pin is also used to provide an external clock signal, which synchronizes the device.


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