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HVLED101 Dataheets PDF



Part Number HVLED101
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description Advanced high power factor flyback controller
Datasheet HVLED101 DatasheetHVLED101 Datasheet (PDF)

HVLED101 Datasheet Advanced high power factor flyback controller with valley locking and maximum power control Features Product status link HVLED101 Product summary Order code Package Packaging HVLED101 Tube SOP14 HVLED101TR Tape and reel • Quasi-Resonant (QR) topology • Primary side regulation of output voltage • Direct optocoupler connection for secondary side regulated loop • High power factor and low THD in universal and extended range (PF> 0.9 and THD < 5% @ full load and < 10% @ .

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HVLED101 Datasheet Advanced high power factor flyback controller with valley locking and maximum power control Features Product status link HVLED101 Product summary Order code Package Packaging HVLED101 Tube SOP14 HVLED101TR Tape and reel • Quasi-Resonant (QR) topology • Primary side regulation of output voltage • Direct optocoupler connection for secondary side regulated loop • High power factor and low THD in universal and extended range (PF> 0.9 and THD < 5% @ full load and < 10% @ 1/3 load) • 800 V fast high-voltage startup • Extremely low input power at no-load and standby conditions • Integrated input voltage detection for high power factor capabilty, DC rail detection and protection triggering • Programmable frequency foldback with valley locking for noise free operation • Programmable maximum input power limitation for safety standard compliancy • Programmable brownout and input overvoltage protection • Latch-free device guarantee by smart Auto Restart Timer (ART) • Input pin for remote protection with NTC management (threshold hysteresis and linearization) Application • Single-stage LED drivers with high power factor up to 180 W • Two-stage LED drivers up to 200 W Description The HVLED101 is an enhanced peak current mode controller able to control mainly high power factor (HPF) flyback or buck-boost topologies having an output power up to 180 W. Some other topologies, like buck, boost and SEPIC could also be implemented. Primary Side Regulation of output voltage and Optocoupler control can be applied independently on the chip both exploiting precise regulation and very low standby power during no-load conditions. The innovative ST high-voltage technology allows to directly connect the HVLED101 to the input voltage in order to both start up the device and monitor the input voltage without the need of external components. Integrated valley locking feature guarantees noise free operation during medium and low load operation and maximum power control allows limiting the input power to a level programmable by the user to increase converter safety. Abnormal conditions like open circuit, output short-circuit, input overvoltage or undervoltage, external protection circuitries and circuit failures like open loop and overcurrent of the main switch are effectively controlled. A smart Auto Restart Timer (ART) function is built in to guarantee an automatic application recover, without any loss of reliability. DS14143 - Rev 3 - March 2023 For further information contact your local STMicroelectronics sales office. www.st.com HVLED101 Block diagram 1 Block diagram HVSU NC Figure 1. Block diagram VCC PGND CS iOVP CFG iOVP BO CFG BO BO HV-StUp PkDet KHV CFG AC/DC NDC Detect DC Det CFG PSR_BM VBM Icharge iOVP OPTO_BM PSR_BM FAULT UVP BO iOVP Vpk MPC Block PSR E/A OTA UVLO UVLO Logic Operational Logic Mode Selection Protections CS pin LEB CFG [1…5] KHVCFG DC Det CFG BO CFG iOVPCFG OCP 2nd OCP VCS_TH Ramp-up PSR_BM Limiter PWM Comp & Latch CFG Delay Generator Dly_on R Q S MOSFET DRIVER Turn On Logic MIN FBint (FB, OPTO) MULT THD Optim MPC ROPTO MIN (FBint, MPC) IOPTO UVP UVP VREF_PSR VBM OPTO_BM F SW-RU FBint IVLBIAS CS pin Valley Lock + DCM VFF_TPD Demag Logic S&H FAULT Fault Bias & COMP FB OPTO THD SGND DLY/CFG GD ZCD VL FAULT DS14143 - Rev 3 page 2/36 HVLED101 Typical applications 2 Typical applications Figure 2. HVLED101 typical PSR application Vin BR1 Cin Dvcc Ccl Rcl Dcl DSec Cout Rmin Out RZCD 1k CTHD COPTO CVCC RPSR,s RDLY HVSU VCC RFB DLY/CFG ZCD FAULT FB HVLED101 GD RGD CS DGD M1 VL SGND THD OPTO PGND RFF RVL RCS CPSR,p CVL CPSR,s NTC CCFG CVCC CCFG NTC Vin BR1 Cin RDLY CFB CVL Figure 3. HVLED101 typical SSR application Dvcc Ccl Rcl Dcl DSec Cout Rmin Rshunt Out 1k CTHD CSSR HVSU VCC RFB DLY/CFG ZCD FAULT FB HVLED101 GD CS VL RGD DGD SGND THD OPTO PGND RFF M1 RVL RCS RZCD VccS Rbias R1_CC R2_CC C2_CC OC1 CV-Rup Vref_CC R2_CV C2_CV CV-Rdw Vref_CV DS14143 - Rev 3 page 3/36 3 Pin Settings Figure 4. Device pinout HVLED101 Pin Settings HVSU 1 N.C. 2 FAULT 3 DLY/CFG 4 VL 5 FB 6 OPTO 7 14 VCC 13 GD 12 PGND 11 CS 10 ZCD 9 SGND 8 THD Table 1. Pin description Symbol Pin Description HVSU High-voltage startup and input voltage detection. The pin, able to withstand 800 V, is to be connected to either the DC side of the input rectifier bridge, using a low value resistor (1 kΩ typ), or the AC side of a rectifier bridge with two diodes. 1 It embeds the internal startup unit that quickly charges the capacitor connected between VCC pin and PGND pin during startup and low consumption. During operational mode, this pin measures the input voltage to obtain high power factor and to detect both input overvoltage and undervoltage, according to protection configuration, selected on the DLY/CFG pin. N.C. 2 Not conn.


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