Document
STM32C031x4/x6
Arm®Cortex®-M0+ 32-bit MCU, 32 KB Flash, 12 KB RAM, 2 x USART, timers, ADC, comm. I/Fs, 2-3.6 V
Datasheet - production data
Features
• Core: Arm® 32-bit Cortex®-M0+ CPU, frequency up to 48 MHz
• -40°C to 85°C/105°C/125°C operating temperature
• Memories – Up to 32 Kbytes of flash memory with protection – 12 Kbytes of SRAM with HW parity check
• CRC calculation unit • Reset and power management
– Voltage range: 2.0 V to 3.6 V – Power-on/Power-down reset (POR/PDR) – Programmable Brownout reset (BOR) – Low-power modes:
Sleep, Stop, Standby, Shutdown
• Clock management – 4 to 48 MHz crystal oscillator – 32 kHz crystal oscillator with calibration – Internal 48 MHz RC oscillator (±1 %) – Internal 32 kHz RC oscillator (±5 %)
• Up to 45 fast I/Os – All mappable on external interrupt vectors – Multiple 5 V-tolerant I/Os
• 3-channel DMA controller with flexible mapping • 12-bit, 0.4 µs ADC (up to 19 ext. channels)
– Conversion range: 0 to 3.6 V
• 8 timers: 16-bit for advanced motor control, four 16-bit general-purpose, two watchdogs, SysTick timer
• Calendar RTC with alarm
TSSOP20 6.4 × 4.4 mm
LQFP32 7 × 7 mm
LQFP48 7 × 7 mm
UFQFPN28 4 × 4 mm
UFQFPN32 5 × 5 mm
UFQFPN48 7 × 7 mm
• Communication interfaces – One I2C-bus interface supporting Fastmode Plus (1 Mbit/s) with extra current sink, supporting SMBus/PMBus and wakeup from Stop mode
– Two USARTs with master/slave synchronous SPI; one supporting ISO7816 interface, LIN, IrDA capability, auto baud rate detection and wakeup feature
– One SPI (24 Mbit/s) with 4- to 16-bit programmable bitframe, multiplexed with I2S interface
• Development support: serial wire debug (SWD)
• All packages ECOPACK 2 compliant
Table 1. Device summary
Reference
Part number
STM32C031x4 STM32C031x6
STM32C031C4, STM32C031F4, STM32C031G4, STM32C031K4
STM32C031C6, STM32C031F6, STM32C031G6, STM32C031K6
December 2022
This is information on a product in full production.
DS13867 Rev 3
1/108
www.st.com
Contents
Contents
STM32C031x4/x6
1 2 3
2/108
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 Arm® Cortex®-M0+ core with MPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.2 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.3 Embedded flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.4 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.5 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.6 Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 13 3.7 Power supply management . . ..