Document
HAT1043M
Silicon P Channel Power MOS FET Power Switching
Features
• Low on-resistance • Low drive current • High density mounting • 2.5 V gate drive device can be driven from 3 V source
Outline
RENESAS Package code: PTSP0006FA-A (Package name: TSOP-6)
4
5
6
3
3
G
2
1
REJ03G1151-0600 (Previous: ADE-208-754D)
Rev.6.00 Sep 07, 2005
1 256 D DDD
S 4
4 3 1, 2, 5, 6
Source Gate Drain
Rev.6.00 Sep 07, 2005 page 1 of 6
HAT1043M
Absolute Maximum Ratings
Item
Symbol
Value
Drain to source voltage Gate to source voltage
VDSS
–20
VGSS
±12
Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel dissipation
ID ID (pulse) Note 1
IDR Note 2 Pch (pulse) Note 2 Pch (continuous) Note 3
–4.4 –17.6 –4.4
2.0 1.05
Channel temperature
Tch
150
Storage temperature
Tstg
–55 to +150
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. When using the alumina ceramic board (50 × 50 × 0.7 mm), PW ≤ 5 s, Ta = 25°C
3. When using the alumina ceramic board (50 × 50 × 0.7 mm), Ta = 25°C
(Ta = 25°C) Unit
V V A A A W W °C °C
Electrical Characteristics
Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance
Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time
Note: 4. Pulse test
Symbol V (BR) DSS
IGSS IDSS VGS (off) RDS (on) RDS (on) |yfs| Ciss Coss Crss Qg Qgs Qgd td (on)
tr td (off)
tf VDF trr
Min –20 — — –0.4 — —
4 — — — — — — — — — — — —
Typ — — — — 55 85 7 750 310 220 11 2 3.5 15 100 85 100 –0.95 50
Max — ±0.1 –1 –1.4 65 110 — — — — — — — — — — — –1.23 —
Unit V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns ns ns V ns
(Ta = 25°C) Test Conditions ID = –10 mA, VGS = 0 VGS = ±12 V, VDS = 0 VDS = –20 V, VGS = 0 ID = –1 mA, VDS = –10 V ID = –3 A, VGS = –4.5 V Note 4 ID = –3 A, VGS = –2.5 V Note 4 ID = –3 A, VDS = –10 V Note 4 VDS = –10 V VGS = 0 f = 1 MHz VDD = –10 V VGS = –4.5 V ID = –4.4 A VGS = –4.5 V, ID = –3 A, RL = 3.3 Ω
IF = –4.4 A, VGS = 0 IF = –4.4 A, VGS = 0 diF/dt = –20 A/µs
Rev.6.00 Sep 07, 2005 page 2 of 6
HAT1043M
Main Characteristics
Power vs. Temperature Derating 2.0
Channel Dissipation Pch (W)
1.5
1.0
0.5
Drain Current ID (A)
0
0
50
100
150
200
Ambient Temperature Ta (°C)
Test Condition: When using the alumina ceramic board (50 × 50 × 0.7 mm), (PW ≤ 5 s)
Typical Output Characteristics
–10 –10 V
–4 V
–8
–3 V
–2.5 V
–6
Pulse Test –2 V
–4
–2
VGS = –1.5 V
0
0
–2 –4 –6 –8 –10
Drain to Source Voltage VDS (V)
Drain to Source Saturation Voltage vs. Gate to Source Voltage
–0.5 Pulse Test
–0.4
–0.3
–0.2
ID = –5 A
–0.1
–2 A
–1 A
0
0
–4 –8 –12 –16 –20
Gate to Source Voltage VGS (V)
Drain to Source Saturation Voltage VDS (on) (V)
Rev.6.00 Sep 07, 2005 page 3 of 6
Drain to Source on State Resistance RDS (on) (mΩ)
Drain Current ID (A)
Drain Current ID (A)
Maximum Safe Operation Area –100
–30
10 µs
–10
–3 –1 –0.3 –0.1 –0.03
OperaDtCioOnpienraPtWion=(1P0Wms
1 (1
ms shot)
this area is limited by RDS (on)
Ta = 25°C
≤ N5oste)5
1 shot pulse
–0.01
–0.1 –0.3 –1 –3 –10
100 µs –30 –100
Drain to Source Voltage VDS (V) Note 5: When using the alumina ceramic board (50 × 50 × 0.7 mm)
Typical Transfer Characteristics
–10 VDS = –10 V Pulse Test
–8
–6
–4
–2
Tc = –25°C
75°C
25°C
0
0
–1 –2 –3 –4 –5
Gate to Source Voltage VGS (V)
Static Drain to Source on State Resistance vs. Drain Current
1000 Pulse Test
500
200
100
VGS = –2.5 V
50 –4.5 V
20 10 –0.1 –0.2 –0.5 –1 –2 –5 –10 –20
Drain Current ID (A)
HAT1043M
Static Drain to Source on State Resistance RDS (on) (mΩ)
Static Drain to Source on State Resistance vs. Temperature
250 Pulse Test
200
–1 A, –2 A 150
ID = –5 A
100 –2.5 V
–5 A
50 0 –50
VGS = –4.5 V
–1 A, –2 A
0
50 100 150 200
Case Temperature Tc (°C)
Body-Drain Diode Reverse Recovery Time
500
Reverse Recovery Time trr (ns)
200 100
50
20
10 –0.1 –0.2
di / dt = 20 A / µs VGS = 0, Ta = 25°C
–0.5 –1 –2 –5 –10
Reverse Drain Current IDR (A)
Drain to Source Voltage VDS (V)
Dynamic Input Characteristics
0
0
VDD = –5 V
–10 V
–10
–20 V
–2
–20
VGS
VDS
–30
VDD = –5 V
–10 V
–20 V
–40
ID = –4.4 A –50
0
4
8
12 16
Gate Charge Qg (nc)
–4
–6
–8
–10 20
Gate to Source Voltage VGS (V) Switching Time t (ns)
Capacitance C (pF)
Forward Transfer Admittance |yfs| (S)
Forward Trans.