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ADS8691, ADS8695, ADS8699 SBAS777B – DECAEMDBSE8R629011,6A– DRESV8IS6E9D5,MAARDCSH82609291
SBAS777B – DECEMBER 2016 – REVISED MARCH 2021
ADS869x 18-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System
With Programmable, Bipolar Input Ranges
1 Features
• 18-bit ADC with integrated analog front-end • High speed:
– ADS8691: 1 MSPS – ADS8695: 500 kSPS – ADS8699: 100 kSPS • Software programmable input ranges: – Bipolar ranges: ±12.288 V, ±10.24 V, ±6.144 V,
±5.12 V, and ±2.56 V – Unipolar ranges: 0 V–12.288 V, 0 V–10.24 V,
0 V–6.144 V, and 0 V–5.12 V • 5-V analog supply: 1.65-V to 5-V I/O supply • Constant resistive input impedance ≥ 1 MΩ • Input overvoltage protection: up to ±20 V • On-chip, 4.096-V reference with low drift • Excellent performance:
– DNL: ±0.6 LSB; INL: ±1.75 LSB – SNR: 92.5 dB; THD: –110 dB • ALARM → high, low threshold • multiSPI™ interface with daisy-chain • Extended industrial temperature range: –40°C to +125°C
2 Applications
• Analog input modules • Data acquisition (DAQ) • Semiconductor tests • LCD tests
3 Description
The ADS8691, ADS8695, and ADS8699 belong to a family of integrated data acquisition system based on a successive approximation (SAR) analog-to-digital converter (ADC). The devices feature a high-speed, high-precision SAR ADC, integrated analog front-end (AFE) input driver circuit, overvoltage protection circuit up to ±20 V, and an on-chip 4.096-V reference with extremely low temperature drift.
The devices operate on a single 5-V analog supply, but support true bipolar input ranges of ±12.288 V, ±6.144 V, ±10.24 V, ±5.12 V, and ±2.56 V, as well as unipolar input ranges of 0 V to 12.288 V, 0 V to 10.24 V, 0 V to 6.144 V, and 0 V to 5.12 V. The gain and offset errors are accurately trimmed within the specified values for each input range to ensure high dc precision. The input range selection is done by software programming of the device internal registers. The devices offer a high resistive input impedance (≥ 1 MΩ) irrespective of the selected input range.
The multiSPI digital interface is backward-compatible to the traditional SPI protocol. Additionally, configurable features simplify interface to a wide range of host controllers.
Device Information (1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
ADS869x
TSSOP (16)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
AVDD ADS869x
DVDD
4.096-V Reference
REFIO REFCAP
AIN_P AIN_GND
1 M: 1 M:
OVP OVP
PGA
2nd-Order LPF
ADC Driver
VBIAS
Oscillator
18-Bit SAR ADC
Digital Logic and Interface
CONVST/CS SCLK SDI SDO
AGND
DGND
Block Diagram
REFGND
CopyrighAtn©I2M0P21OTReTxaAsNInTsNtruOmTeInCtsEInactotrhpeoreatnedd of this data sheet addresses availability, warranty, changes, use iSnusbamfeittyD-corcituicmael anpt pFleiceadtbioancsk,
1
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Product Folder Links: ADS8691 ADS8695 ADS8699
ADS8691, ADS8695, ADS8699
SBAS777B – DECEMBER 2016 – REVISED MARCH 2021
www.ti.com
Table of Contents
1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................4 6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5 6.2 ESD Ratings............................................................... 5 6.3 Recommended Operating Conditions.........................5 6.4 Thermal Information....................................................5 6.5 Electrical Characteristics.............................................6 6.6 Timing Requirements: Conversion Cycle..................10 6.7 Timing Requirements: Asynchronous Reset.............10 6.8 Timing Requirements: SPI-Compatible Serial
Interface...................................................................... 10 6.9 Timing Requirements: Source-Synchronous
Serial Interface (External Clock)..................................11 6.10 Timing Requirements: Source-Synchronous
Serial Interface (Internal Clock)................................... 11 6.11 Timing Diagrams..................................................... 12 6.12 Typical Characteristics............................................ 15 7 Detailed Description......................................................22
7.1 Overview................................................................... 22 7.2 Functional Block Diagram......................................... 22 7.3 Feature Description...................................................23.