SN54ABT8543

SN54ABT8543, SN74ABT8543 SCAN TEST DEVICES WITH OCTAL REGISTERED BUS TRANSCEIVERS SCBS120E – AUGUST 1991 – REVISED JULY 1996 D Members of the Texas Instruments SCOPE ™ Family of Testability Products D Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture D Functionally Equivalent to ’F543 and ’ABT543 in the Normal-Function Mode D SCOPE ™ Instruction Set – IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ – Parallel-Signature Analysis at Inputs With Masking Option – Pseudo-Random Pattern Generation From Outputs – Sample Inputs/Toggle Outputs – Binary Count From Outputs – Even-Parity Opcodes D Two Boundary-Scan Cells Per I/O for Greater Flexibility D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DL) Packages, Ceramic Chip Carriers (FK), and Standard Ceramic DIPs (JT) description The ’ABT8543 scan test devices with octal registered bus transceivers are members of the Texas Instruments SCOPE™ testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface. A2 A3 GND A4 A5 A6 A7 SN54ABT8543 . . . JT PACKAGE SN74ABT8543 . . . DL OR DW PACKAGE (TOP VIEW) LEAB 1 CEAB 2 OEAB 3 A1 4 A2 5 A3 ...