SCAN TEST DEVICE
SN54ABT18640, SN74ABT18640
SCAN TEST DEVICES WITH 18-BIT INVERTING BUS TRANSCEIVERS
SCBS267C – FEBRUARY 1994 – REVISED J...
Description
SN54ABT18640, SN74ABT18640
SCAN TEST DEVICES WITH 18-BIT INVERTING BUS TRANSCEIVERS
SCBS267C – FEBRUARY 1994 – REVISED JULY 1996
D Members of the Texas Instruments
SCOPE ™ Family of Testability Products
D Members of the Texas Instruments
Widebus™ Family
D Compatible With the IEEE Standard
1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
D SCOPE ™ Instruction Set
– IEEE Standard 1149.1-1990 Required Instructions and Optional CLAMP and HIGHZ
– Parallel-Signature Analysis at Inputs – Pseudo-Random Pattern Generation
From Outputs – Sample Inputs/Toggle Outputs – Binary Count From Outputs – Device Identification – Even-Parity Opcodes
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Packaged in Plastic Shrink Small-Outline
(DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Packages
description
The ’ABT18640 scan test devices with 18-bit inverting bus transceivers are members of the Texas Instruments SCOPE™ testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.
SN54ABT18640 . . . WD PACKAGE SN74ABT18640 . . . DGG OR DL PACKAGE
(TOP VIEW)
1DIR 1 1B1 2 1B2 3 GND 4 1B3 5 1B4 6 VCC 7 1B5 8 1B6 9 1B7 10 GND 11 1B8 12 1B9 13 2B1 14 2B2 15 2B3 16 2B4 17 GND 18 2B5 19 2B6 20 2B7 21 VCC...
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