SN74ABTH25245

D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 D Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C D High-Impedance State During Power Up and Power Down D Designed to Facilitate Incident-Wave Switching for Line Impedances of 25 Ω or Greater D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D Package Options Include Plastic Small-Outline (DW) Package, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) DIPs description The ’ABTH25245 are 25-Ω octal bus transceivers designed for asynchronous communication between data buses. They improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented transceivers. These devices allow noninverted data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can disable the device so that both buses are effectively isolated. When OE is low, the device is active. SN54ABTH25245, SN74ABTH25245 25-Ω OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS251F – JUNE 1992 – REVISED MAY 1997 SN54ABTH25245 . . . JT PACKAGE SN74ABTH25245 ...