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AD1845 Dataheets PDF



Part Number AD1845
Manufacturers Analog Devices
Logo Analog Devices
Description Parallel-Port 16-Bit SoundPort Stereo Codec
Datasheet AD1845 DatasheetAD1845 Datasheet (PDF)

a FEATURES Single-Chip Integrated ∑∆ Digital Audio Stereo Codec Microsoft ® and Windows® Sound System Compatible MPC Level-2+ Compliant Mixing 16 mA Bus Drive Capability Supports Two DMA Channels for Full Duplex Operation On-Chip Capture and Playback FIFOs Advanced Power-Down Modes Programmable Gain and Attenuation Sample Rates from 4.0 kHz to 50 kHz Derived from a Single Clock or Crystal Input 68-Lead PLCC, 100-Lead TQFP Packages Operation from +5 V Supplies Byte-Wide Parallel Interface to ISA .

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a FEATURES Single-Chip Integrated ∑∆ Digital Audio Stereo Codec Microsoft ® and Windows® Sound System Compatible MPC Level-2+ Compliant Mixing 16 mA Bus Drive Capability Supports Two DMA Channels for Full Duplex Operation On-Chip Capture and Playback FIFOs Advanced Power-Down Modes Programmable Gain and Attenuation Sample Rates from 4.0 kHz to 50 kHz Derived from a Single Clock or Crystal Input 68-Lead PLCC, 100-Lead TQFP Packages Operation from +5 V Supplies Byte-Wide Parallel Interface to ISA and EISA Buses Pin Compatible with AD1848, AD1846, CS4248, CS4231 Parallel-Port 16-Bit SoundPort® Stereo Codec AD1845 plete on-chip filtering, MPC Level-2 compliant analog mixing, programmable gain, attenuation and mute, a variable sample frequency generator, FIFOs, and supports advanced powerdown modes. It provides a direct, byte-wide interface to both ISA (“AT”) and EISA computer buses for simplified implementation on a computer motherboard or add-in card. The AD1845 SoundPort Stereo Codec supports a DMA request/grant architecture for transferring data with the host computer bus. One or two DMA channels can be supported. Programmed I/O (PIO) mode is also supported for control register accesses and for applications lacking DMA control. Two input control lines support mixed direct and indirect addressing of thirty-seven internal control registers over this asynchronous interface. The AD1845 includes dual DMA count registers for full duplex operation enabling the AD1845 to capture data on one DMA channel and play back data on a separate channel. The FIFOs on the AD1845 reduce the risk of losing data when making DMA transfers over the ISA/EISA bus. The FIFOs buffer data transfers and allow for relaxed timing in acknowledging requests for capture and playback data. PRODUCT OVERVIEW The Parallel Port AD1845 SoundPort Stereo Codec integrates key audio data conversion and control functions into a single integrated circuit. The AD1845 provides a complete, single chip computer audio solution for business audio and multimedia applications. The codec includes stereo audio converters, com- (Continued on Page 9) FUNCTIONAL BLOCK DIAGRAM ANALOG L_MIC R_MIC L_LINE R_LINE L_AUX1 R_AUX1 M U X 0 dB/ 20 dB L GAIN R GAIN ANALOG SUPPLY DIGITAL SUPPLY CLOCK SOURCE POWER DOWN RESET DIGITAL VARIABLE SAMPLE FREQUENCY GENERATOR ⌺⌬ A/D CONVERTER ⌺⌬ A/D CONVERTER AD1845 ␮-LAW A-LAW LINEAR PLAYBACK REQ PLAYBACK ACK FIFO P A R A L L E L P O R T CAPTURE REQ CAPTURE ACK ADR1:0 DATA7:0 CS RD WR BUS DRIVER CONTROL HOST DMA INTERRUPT EXTERNAL CONTROL GAM GAM GAM L_OUT M_OUT R_OUT MUTE ⌺ ⌺ ⌺ ⌺ ⌺ DIGITAL MIX GAM = GAIN ATTENUATE ATTENTUATE MUTE L ATTENUATE ⌺⌬ D/A ⌺ CONVERTER MUTE ⌺ GAM ⌺ GAM R ATTENUATE MUTE ⌺⌬ D/A CONVERTER ␮-LAW A-LAW LINEAR FIFO ⌺ M_IN L_AUX2 R_AUX2 REFERENCE CONTROL REGISTERS VREF_F VREF SoundPort is a registered trademark of Analog Devices, Inc. Microsoft and Windows are registered trademarks of Microsoft Corporation. REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1997 AD1845–SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED Temperature Digital Supply (VDD) Analog Supply (VCC) Word Rate (FS) Input Signal Analog Output Passband ADC FFT Size DAC FFT Size VIH VIL ANALOG INPUT 25 °C 5.0 V 5.0 V 48 kHz 1008 Hz 20 Hz to 20 kHz 2048 8192 5 V 0 V DAC Test Conditions Calibrated 0 dB Relative to Full Scale 16-Bit Linear Mode 10 kΩ Output Load Mute Off, OL = 0 ADC Test Conditions Calibrated 0 dB Gain –1.0 dB Relative to Full Scale Line Input 16-Bit Linear Mode Min Typ 1 2.83 0.1 0.283 1 2.83 17 15 Max Units V rms V p-p V rms V p-p V rms V p-p kΩ pF Input Voltage (RMS Values Assume Sine Wave Input) Line 2.55 MIC with +20 dB Gain (MGE = 1) 0.255 MIC with 0 dB Gain (MGE = 0) Input Impedance* Input Capacitance PROGRAMMABLE GAIN AMPLIFIER–ADC 3.35 0.335 3.35 2.55 10 Min Step Size (All Steps Tested) (0 dB to 22.5 dB) PGA Gain Range Span 0.7 21.5 Typ 1.5 22.5 Max 1.9 23.5 Units dB dB AUXILIARY LINE, MONO, AND MICROPHONE INPUT ANALOG GAIN/AMPLIFIERS/ATTENUATORS Min Step Size : AUX1, AUX2, LINE, MIC (All Steps Tested) (+12 dB to –30 dB) (–31.5 dB to –34.5 dB) Step Size: M_IN (All Steps Tested) (0 dB to –39 dB) (–42 dB to –45 dB) Input Gain/Attenuation Range: AUX1, AUX2, LINE, MIC Input Gain/Attenuation Range: M_IN DIGITAL DECIMATION AND INTERPOLATION FILTERS* Typ 1.5 1.5 3.0 3.0 46.5 45 Max 1.75 2.0 3.6 3.85 49.0 49 Units dB dB dB dB dB dB 1.25 1 2.5 2.2 45.0 42 Min Passband Passband Ripple Transition Band Stopban.


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