A416316B

A416316B Series Preliminary Document Title 64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE Revision History Rev. No. 0.0 64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE History Initial issue Issue Date November 15, 2000 Remark Preliminary PRELIMINARY (November, 2000, Version 0.0) AMIC Technology, Inc. A416316B Series Preliminary Features n Organization: 65,536 words X 16 bits n Part Identification: - A416316B - A416316B-L (with self-refresh mode) n High speed - 30/35/40 ns RAS access time - 16/18/20 ns column address access time - 10/11/12 ns CAS access time n Low power consumption - Operating: 75mA (-30 max) - Standby: 3 mA (TTL) Separate CAS ( UCAS , LCAS ) for byte selection Self refresh mode 256 refresh cycles, 4 ms refresh interval Read-modify-write, RAS -only, CAS -before- RAS , Hidden refresh capability n TTL-compatible, three-state I/O n JEDEC standard packages - 400mil, 40-pin SOJ - 400mil, 40/44 TSOP type II package n Single 5V power supply/built-in VBB generator n n n n 64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE Pin Configuration n SOJ n TSOP Pin Descriptions Symbol VCC I/O0 I/O 1 I/O 2 I/O 3 VCC I/O 4 I/O 5 I/O 6 I/O 7 NC NC WE RAS NC A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VSS I/O 15 I/O14 I/O13 I/O12 VSS I/O11 I/O10 I/O9 I/O8 NC LCAS UCAS OE NC A7 A6 A5 A4 VSS VCC I/O0 I/O 1 I/O 2 I/O 3 VCC I/O 4 I/O5 I/O 6 I/O 7 NC NC WE RAS NC A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 ...