Document
A43L8316
Preliminary
128K X 16 Bit X 2 Banks Synchronous DRAM
Document Title 128K X 16 Bit X 2 Banks Synchronous DRAM
Revision History
Rev. No. History 0.0 Initial issue
Issue Date February 15, 2000
Remark Preliminary
Preliminary (February, 2000, Version 0.0)
AMIC Technology, Inc.
A43L8316
Preliminary
128K X 16 Bit X 2 Banks Synchronous DRAM
Features
n JEDEC standard 3.3V power supply n LVTTL compatible with multiplexed address n Dual banks / Pulse RAS n MRS cycle with address key programs
- CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) n All inputs are sampled at the positive going edge of the system clock
n Burst Read Single-bit Write operation n DQM for masking n Auto & self refresh n 16ms refresh period (1K cycle) n 50 Pin TSOP (II)
General Description
The A43L8316 is 4,194,304 bits synchronous high data rate Dynamic RAM organized as 2 X 131,072 words by 16 bits, fabricated with AMIC’s high performance CMOS technology. .