Document
A45L9332A Series
256K X 32 Bit X 2 Banks Synchronous Graphic RAM
Document Title 256K X 32Bit X 2 Banks Synchronous Graphic RAM
Revision History
Rev. No.
0.0 0.1 1.0 1.1
History
Initial issue Update AC and DC data specification Final version release Add Pb-Free package type
Issue Date
August 21, 2001 October 22, 2001 September 29, 2003 August 19, 2004
Remark
Preliminary
Final
(August, 2004, Version 1.1)
AMIC Technology, Corp.
A45L9332A Series
256K X 32 Bit X 2 Banks Synchronous Graphic RAM
Features
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address
Dual banks / Pulse RAS MRS cycle with address key programs - CAS Latency (2,3) - Burst Length (1,2,4,8 & full page) - Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst Read Single-bit Write operation DQM 0-3 for byte masking Auto & self refresh 32ms refresh period (2K cycle)
100 Pin QFP, LQFP (14 X 20 mm)
Graphics Features
SMRS cycle - Load mas.