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74LS138 Dataheets PDF



Part Number 74LS138
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Decoder/Demultiplexer
Datasheet 74LS138 Datasheet74LS138 Datasheet (PDF)

DM74LS138 • DM74LS139 Decoder/Demultiplexer August 1986 Revised March 2000 DM74LS138 • DM74LS139 Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually les.

  74LS138   74LS138


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DM74LS138 • DM74LS139 Decoder/Demultiplexer August 1986 Revised March 2000 DM74LS138 • DM74LS139 Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The DM74LS138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The DM74LS139 comprises two separate two-line-to-fourline decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications. All of these decoders/demultiplexers feature fully buffered inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system design. Features s Designed specifically for high speed: Memory decoders Data transmission systems s DM74LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and/or data reception s DM74LS139 contains two fully independent 2-to-4-line decoders/demultiplexers s Schottky clamped for high performance s Typical propagation delay (3 levels of logic) DM74LS138 DM74LS139 DM74LS138 DM74LS139 21 ns 21 ns 32 mW 34 mW s Typical power dissipation Ordering Code: Order Number DM74LS138M DM74LS138SJ DM74LS138N DM74LS139M DM74LS139SJ DM74LS139N Package Number M16A M16D N16E M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2000 Fairchild Semiconductor Corporation DS006391 www.fairchildsemi.com DM74LS138 • DM74LS139 Connection Diagrams DM74LS138 DM74LS139 Function Tables DM74LS138 Inputs Enable X L H H H H H H H H H X L L L L L L L L Select X X X X X X L L L L L H L H L L H H H L L H L H H H L H H H H H L H H H H H H H H H H L H H H H H H H H H H L H H H H H Outputs Inputs Enable G H L L L L H H H H H H H L H H H H H H H H H H L H H H H H H H H H H L H = HIGH Level L = LOW Level X = Don’t Care Note 1: G2 = G2A + G2B DM74LS139 Outputs Y0 H L H H H Y1 H H L H H Y2 H H H L H Y3 H H H H L Select B X L L H H A X L H L H G1 G2 (Note 1) C B A YO Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H H H L H H H H H H H H H H L H H H Logic Diagrams DM74LS138 DM74LS139 www.fairchildsemi.com 2 DM74LS138 • DM74LS139 Absolute Maximum Ratings(Note 2) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0°C to +70°C −65°C to +150°C Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. DM74LS138 Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 −0.4 8 70 Nom 5 Max 5.25 Units V V V mA mA °C DM74LS138 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL II IIH IIL IOS ICC Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current Short Circuit Output Current Supply Current Conditions VCC = Min, II = −18 mA VCC = Min, IOH = Max, VIL = Max, VIH = Min VCC = Min, IOL = Max, VIL = Max, VIH = Min IOL = 4 mA, VCC = Min VCC = Max, VI = 7V VCC = Max, VI = 2.7V VCC = Max, VI = 0.4V VCC = Max (Note 4) VCC = Max (Note 5) −20 6.3 2.7 3.4 0.35 0.25 0.5 0.4 0.1 20 −0.36 −100 10 Min Typ (Note 3) Max −1.5 Units V V V mA µA mA mA mA Note 3: All typicals are at VCC =.


A62S7308B 74LS138 KTC3202


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