16-bit and 24-bit ADC
CS5531/32/33/34
16-Bit and 24-Bit ADCs with Ultra Low Noise PGIA
Features
Chopper Stabilized PGIA (Programmable Gain I...
Description
CS5531/32/33/34
16-Bit and 24-Bit ADCs with Ultra Low Noise PGIA
Features
Chopper Stabilized PGIA (Programmable Gain Instrumentation Amplifier, 1x to 64x)
6 nV/√Hz @ 0.1 Hz (No 1/f noise) at 64x 500 pA Input Current with Gains >1
Delta-Sigma Analog-to-Digital Converter
Linearity Error: 0.0007% FS Noise Free Resolution: Up to 23 bits
Two or Four Channel Differential MUX
Scalable Input Span via Calibration
±5 mV to differential ±2.5V
Scalable VREF Input: Up to Analog Supply Simple three-wire serial interface
SPI®and Microwire™ Compatible
Schmitt Trigger on Serial Clock (SCLK)
R/W Calibration Registers Per Channel
Selectable Word Rates: 6.25 to 3,840 Sps
Selectable 50 or 60 Hz Rejection
Power Supply Configurations
VA+ = +5 V; VA- = 0 V; VD+ = +3 V to +5 V VA+ = +2.5 V; VA- = -2.5 V; VD+ = +3 V to +5 V VA+ = +3 V; VA- = -3 V; VD+ = +3 V
General Description
The CS5531/32/33/34 are highly integrated ∆Σ Analogto-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applications.
To accommodate these applications, the ADCs come as either two-channel (CS5531/32) or four-channel (CS5533/34) devices and include a very low noise chopper-stabilized instrumentation amplifier (6 nV/√Hz @ 0.1 Hz) with selectable gains of 1×, 2×, 4×, 8×, 16×, 32×, and 64×. These ADCs also include a fourt...
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