Document
CT2553 / 2554 / 2555 / 2556
Advanced Integrated MUX (AIM) Hybrid
FOR MIL-STD-1553
Features
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I I I I I I I I I I
Second Source Compatible to the BUS-61553 Complete Integrated MUX Including: • Low Power Dual Transceiver • BC/RTU/MT Protocol • 8K x 16 Shared Ram • Interrupt Logic Compatible with MIL-STD- 1750 and other Standard CPUs DIP or Flatpack Hybrid Minimizes CPU Overhead Provides Memory Mapped 1553 Interface On-Line & Off-Line Self-Test PCs Development Tools Available SEAFAC Tested MIL-PRF-38534 compliant circuits available DESC SMD #5962–88692 Pending Packaging – Hermetic Metal • 78 Pin, 2.1" x 1.87" x .25" Plug-In type package • 82 Lead, 2.2" x 1.61" x .18" Flat package
CIRCUIT TECHNOLOGY
www.aeroflex.com
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General Description
Aeroflex’s CT2553 Advanced Integrated Mux (AIM) Hybrid is a complete MIL-STD-1553 Bus Controller (BC), Remote Terminal Unit (RTU), and Bus Monitor (MT) device. Packaged in a single 78 pin DIP package, the CT2553 contains dual low-power transceivers, complete BC/RTU/MT protocol logic, a MIL-STD-1553-to-host interface unit and an 8K x 16 RAM. Using an industry standard dual transceiver and standard status and control signals, the CT2553 simplifies system integration at both the MIL-STD-1553 and host processor interface levels. All 1553 operations are controlled through the CPU access to the shared 8K x 16 RAM. To ensure maximum design flexibility, memory control lines are provided for attaching external RAM to the CT2553 Address and Data Buses and for disabling internal memory; the total combined memory space can be expanded to 64K x16. All 1553 transfers are entirely memory-mapped; thus the CPU interface requires minimal hardware and/or software support. The CT2553 operates over the full military -55°C to +125°C temperature range. Available screened to MIL-STD883, the CT2553 is ideal for demanding military and industrial microprocessor to 1553 interface applications. See "Ordering Information" (last sheet) for CT2554, CT2555 & CT2556. eroflex Circuit Technology – Data Bus Modules For The Future © SCDCT2553 REV B 8/6/99
Q1553-2 TRANSCEIVER A TX INH CLOCK IN TX MSTRCLR
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1
Aeroflex Circuit Technology
DATA BUS A
2
4
3
TRANSFORMER A RX DECODER
CHANNEL A ENCODER/ MEMORY TIMING
SELECT STRBD READYD RD/WR MEM/REG
RX
CPU TIMING
768µs TIMEOUT
PROTOCOL CONTROLLER
CONTENTION RESOLVER INTERRUPT GENERATOR
EXTEN EXTLD INT
2 TX INH TX
A15 - A00
Q1553-2
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1
D15 - D00
DATA BUS B
2
4
3
CHANNEL B ENCODER/
RX DECODER
TRANSFORMER B
8K X 16 SHARED RAM
RTADR0 RTADR1 RTADR2
RX TRANSCEIVER B
RAM
PARITY CHECKER
RT ADDR
RTADR3 RTADRP RTADR4 RTPARERR
Note: The Watch-Dog Time Out (768µs TYP.) is built in.
SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700
Figure 1 – CT2553 Block Diagram
Values at nominal Power Supply Voltages unless otherwise specified PARAMETER Receiver Differential Input Voltage Differential Input Impedance CMRR Transmitter (Direct Coupled) Differential Output Voltage Output Rise and Fall Times Output Offset Voltage Logic* VIH VIL Clock Power Supplies +5V (Logic) -15VA (Channel A Transceiver) -15VB (Channel B Transceiver) +5VA (Channel A) +5VB (Channel B) Current Drain* (Total Package) +5V (Idle) -15V (Idle) +5V (25% Duty Cycle) -15V (25% Duty Cycle) Temperature Range Operating (Case) Storage Physical Characteristics Size 78 pin DDIP 82 pin flatpack
* See Table 7 for pin loading characteristics.
VALUE 40 max 7 min 40 min 6.0 min, 9.0 max 100 min, 300 max ±90 max 2.2 min 0.8 max 16 +5±5% -15±10% -15±10% +5±5% +5±5% (TYP)/max (85)/170 (45)/80 (85)/170 (80)/130
−55 to +125 −65 to +150
UNITS Vp-p KΩ db Vp-p nsec mV V V MHZ V V V V V mA mA mA mA °C °C
2.1 x 1.87 x 0.25 (53 x 47.5 x 6.4) 2.19 x 1.6 x 0.175 (55.6 x 40.6 x 4.34)
in (mm) in (mm)
Table 1 – CT2553 Specifications
GENERAL The CT2553 is a complete MIL-STD-1553 bus interface unit containing dual low-power transceivers; Bus Controller (BC), Remote Terminal (RTU), and Bus Monitor (MT) protocol logic; 8K x 16-bit pseudo dual port RAM; and memory management arbitration control circuitry. The host processor interface consists of standard control and interrupt signals, memory expansion capability and non-multiplexed address and data buses. Control of the CT2553 is accomplished entirely through the use of three internal registers and the
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shared RAM. Transfers to and from the CT2553 are executed on a word-by-word basis ensuring minimal wait time if contention occurs. The specific mods of operation (1553 BC/RTU/MT) is software programmable. Memory is configured into unique control and data block areas based on the 1553 mode of operation. External registers are also supported by the CT2553 for manipulation of user data. In addition, the CT2553 provides dynamic, online and software initiated self-test capabilities.
Aeroflex Circuit Technology
SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700
INTERFACING The CT2553 is compatible with mo.