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CT2578-02-CG-F84 Dataheets PDF



Part Number CT2578-02-CG-F84
Manufacturers Aeroflex Circuit Technology
Logo Aeroflex Circuit Technology
Description CT2578 / CT2581 SIMPLE REMOTE TERMINAL FOR MIL-STD-1553 / 1760 & McAir
Datasheet CT2578-02-CG-F84 DatasheetCT2578-02-CG-F84 Datasheet (PDF)

CT2578 / CT2581 SIMPLE REMOTE TERMINAL FOR MIL-STD-1553 / 1760 & McAir CIRCUIT TECHNOLOGY TECHNOLOGY CIRCUIT www.aeroflex.com/act1.htm www.aeroflex.com/act1.htm FEATURES s s s s s s s s s Complete RT Protocol Meets MIL-STD-1553 A/B & MIL-STD-1760 Simple interface Dual Transceivers (1553 / 1760 or McAir) +5V only Power Supply Low Power (0.15 Watts per Channel) Only validated messages transferred Optional Data Wrap Around Store Released Signal s Packaging – Hermetic Ceramic q q 119 Lead, 1.2.

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CT2578 / CT2581 SIMPLE REMOTE TERMINAL FOR MIL-STD-1553 / 1760 & McAir CIRCUIT TECHNOLOGY TECHNOLOGY CIRCUIT www.aeroflex.com/act1.htm www.aeroflex.com/act1.htm FEATURES s s s s s s s s s Complete RT Protocol Meets MIL-STD-1553 A/B & MIL-STD-1760 Simple interface Dual Transceivers (1553 / 1760 or McAir) +5V only Power Supply Low Power (0.15 Watts per Channel) Only validated messages transferred Optional Data Wrap Around Store Released Signal s Packaging – Hermetic Ceramic q q 119 Lead, 1.28" SQ. x .16" PGA 84 Lead, 1.645" SQ. x .14" CQFP s s s s s s Any Message may be Illegalized McAir Reduced Response Time Option (inh MC1F) Optional 1760 checksum 1760 Header word identification Latched RT Address MIL-PRF-38534 Compliant Circuits Available FUNCTIONAL BLOCK DIAGRAM MANCHESTER DECODER TRANSEIVER 16 BIT RECEIVE BUFFER 16 BIT TRANSMIT BUFFER MANCHESTER DECODER WATCHDOG TIMER ENCODER / DECODER REMOTE TERMINAL STATE SEQUENCER MANCHESTER DECODER RT PROTOCOL TRANSEIVER 16 BIT RECEIVE BUFFER 16 BIT TRANSMIT BUFFER MANCHESTER DECODER WATCHDOG TIMER ENCODER / DECODER STATUS REGISTER COMMAND REGISTER WORD COUNTER BUS 0 LAST COMMAND REG BIT REGISTER BUS 1 CMD / HRD / DATA STORE RELEASED HEADER WORD IDENT 1760 CHECKSUM GENERATION/VALIDATION 1760 OPTIONS 32 WORD DATA MEMORY eroflex Circuit Technology – Data Bus Modules For The Future © SCDCT2578 REV B 3/12/98 GENERAL DESCRIPTION CT2578 is for use in simple Remote Terminal applications without the need for a processor or software development. It provides the complete protocol for a Remote Terminal, supporting all types of message transfers including all 15 mode codes, with comprehensive error checking. Error handling of data is not required by the subsystem. The user interface is a 16 bit bidirectional highway with a few control lines. The low power transceivers are capable of providing the output voltage required by MIL-STD-1760 and are powered by a +5V supply. If sinusoidal (McAir) transceivers are required then the part number becomes CT2581. This is the only difference between CT2578 and CT2581. A 32 word data buffer memory is used to store messages until validation is complete. Only validated messages are transferred to the subsystem at a rate of 500 nS per word. Data to be transmitted is transferred from the subsystem to this buffer memory at a maximum rate of 1 uS per word. This data memory may be bypassed in the receive mode and data transferred to the subsystem on a word by word basis as it is being received. The device has an optional RT wrap around capability. When WRAPEN is active, data received at subaddress 1E (30) remains stored in the data buffer memory (i.e. not transferred to the subsystem). If followed by a transmit from subaddress 1E the same data will be transmitted. There is an option within the device to reduce the response time in order to conform to other standards such as 1553A and McAir. In this mode subaddress 1F is allocated a normal subaddress with subaddress 00 reserved for mode commands. Any message may be illegalized by applying an active low on the NME discrete status input. The Remote Terminal will respond with the Message Error bit set in the status and not use the information received. A hardware implementation of the 1760 checksum algorithm within the device may be enabled via signal NENCHK. When transmitting, the checksum word is inserted in the last word position, and when receiving, a valid checksum word will generate the open drain output (STATUS). The STATUS output may be hard wired to any of the discrete status inputs (e.g. Service Request), if it is also hard wired to the input NILLCMD the device will respond to a failed checksum with the selected status bit set and not use the data (i.e. not transfer the data to the subsystem). In addition to the signal NVCR (valid command word received) which may be used to illegalize commands, a signal NHDR (header word received) is available to the subsystem for verification of the 1760 message header. The RT address lines are latched on RESET as required by 1760. If all six RT address lines go open circuit the store released signal (STREL) will go high. The device is packaged in a 119 pin grid array or 84 lead CQFP package. SIGNAL DESCRIPTIONS 1553 / 1760 DATA BUS DATABUS 0 Signal is connected to the positive side of the external data bus transformers for bus 0. NDATABUS 0 Signal is connected to the negative side of the external data bus transformers for bus 0. DATABUS 1 Signal is connected to the positive side of the external data bus transformers for bus 1. NDATABUS 1 Signal is connected to the negative side of the external data bus transformers for bus 1. HARD WIRED ADDR A-E (Inputs with pull up resistor) Remote Terminal address inputs for the unit. ADDR A is the least significant bit and ADDR E is the most significant bit. These inputs are internally latched every time the unit is reset. The latched address information is then compared to the incoming command word. ADDR.


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