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CT2579 Dataheets PDF



Part Number CT2579
Manufacturers Aeroflex Circuit Technology
Logo Aeroflex Circuit Technology
Description APPLICATION NOTE #108
Datasheet CT2579 DatasheetCT2579 Datasheet (PDF)

The Future in Microelectronics 35 South Service Road · Plainview, NY 11803 TEL: 516 694-6700 · FAX: 516 694-6715 CIRCUIT TECHNOLOGY APPLICATION NOTE #108 CT2577 / 79 SmaRT Series Users Guide Point of Contact: John Vanchieri Tel: (516) 752-2484 APPLICATION NOTE #108 1 Released 9/98 Table of Contents Contents MIL-STD-1553 Bus Interface Signals Hard Wired Interface Signals MIL-STD-1760 Signals Bus Interface Signals RT Status Word Discrete Inputs RT Discrete Signals BC Discrete Signals Page .

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The Future in Microelectronics 35 South Service Road · Plainview, NY 11803 TEL: 516 694-6700 · FAX: 516 694-6715 CIRCUIT TECHNOLOGY APPLICATION NOTE #108 CT2577 / 79 SmaRT Series Users Guide Point of Contact: John Vanchieri Tel: (516) 752-2484 APPLICATION NOTE #108 1 Released 9/98 Table of Contents Contents MIL-STD-1553 Bus Interface Signals Hard Wired Interface Signals MIL-STD-1760 Signals Bus Interface Signals RT Status Word Discrete Inputs RT Discrete Signals BC Discrete Signals Page Signal Descriptions...............................................................................................................................................3-7 Remote Terminal (RT) Mode.............................................................................................................................8-21 Sequence of Operation Receive Command Message Illegalization MIL-STD-1760 Features 1760 Header Word Signals that Indicate Checksum Failure Block Transfer Logic READ (Receive) DMA Transfer Times Transmit Command MIL-STD-1760 Features Signals that Indicate Checksum Failure Block Transfer Logic / DMA Transfer Times WRITE Changing the Status Word Bits Device Status Bit Register Data Storage and Retrieval in Ram Sample Software Code Retriving or Loading Data to Ram Self Test Basic Operation Detailed Operation Summary of Operation CT2577/79 RT/BT Memory Map Breakdown .................................................................................................. 22 RT/BT Device Memory Map Code Breakdown Description.....................................................................23-29 RT Status Word Control Sets BC Control Area RT/RX BC/TX Mode Area 00 - SA 00 (0) and BC Control 30 RT Receive / BC Transmit Subaddresses - SA 01-1E (1-30) RT/RX BC/TX Mode Area - SA 1F (31) RT/BC Control Area RT/BC Block Transfer Logic (BTL) Control and Self Test Control RT/TX BC/RX Mode Area - SA 00 (0) 30 RT Transmit / BC Receive Subaddresses -SA 01-1E (1-30) RT/TX BC/RX Mode Area - SA 1F (31) Broadcast RT/RX BC/TX Mode Area - SA 00 (0) 30 Broadcast RT Receive / BC Transmit Subaddresses - SA 01-1E (1-30) Broadcast RT/RX BC/TX Mode Area 1F - SA 1F (31) CT2577/79 Part Ordering Information .........................................................................................................30-34 CT2577 - MIL-STD-1553 / 1760 Bus Controller / Remote Terminal CT2579 - McAir Bus Controller / Remote Terminal CT2577/79 Pinouts...........................................................................................................................................35-41 CT2577-01-xx-F84 - 84 pin Quad Flatpack CT2577-11-xx-F84 - 84 pin Quad Flatpack CT2579-01-xx-F84 - 84 pin Quad Flatpack CT2579-11-xx-F84 - 84 pin Quad Flatpack CT2577-10-xx-P119 - 110 Pin Grid Array CT2579-10-xx-P119 - 110 Pin Grid Array APPLICATION NOTE #108 2 Released 9/98 Signal Descriptions MIL-STD-1553 Bus Interface Signals Data0(Bus) Connect to positive side of the external databus transformer for Bus 0 Ndata0(Bus) Connect to negative side of the external databus transformer for Bus 0 Data1(Bus) Connect to positive side of the external databus transformer for Bus 1 Ndata1(Bus) Connect to negative side of the external databus transformer for Bus 1 Hard Wired Interface Signals AddrA-E Remote Terminal address inputs for the unit. ADDR A is the least significant bit and ADDR E is the most significant bit. RT Address inputs for the unit. AddrA is the LSB, AddrE is the MSB. Parity Bit for the RT Address inputs. AddrP must be set to ODD parity This signal sets the unit to respond with a status word within 4 uS (dead bus time) while in Remote Terminal mode. Subaddress 1F is also enabled to be a valid subaddress for data. Normally subaddress 00 and 1F are reserved for mode codes. “1" = 4 uS dead bus response time, subaddress 1F used for data. “0" = 12 uS response time, subaddress 1F used for mode codes. Select 8 or 16 bit subsystem data interface. In 8 bit mode only the lower 8 bits of the databus (DATA 0-7) are used for all data transfers. If left open circuit the device will default to 16 bit mode. "0" = 16 Bit Mode "1" = 8 Bit Mode Select VME or MULTIBUS subsystem interface. If left open circuit the device will default to VME mode. "0" = Multibus Mode "1" = VME Mode Select Remote Terminal wrap around to subaddress 1E. For this test to work correctly theunit must be in RT mode. The Bus Controller sends data to subaddress 1E which remains in the data buffer memory and is available to be sent back on the very next command by the Bus Controller. The data in the data buffer memory in this mode does not get transferred to the main RAM. If the very next command is not a transmit command to subaddress 1E, the data buffer memory is flushed and will respond normally to the next set of commands. If the wrap around test is enabled, data to subaddress 1E must be transferred in the correct sequence. "0" = Normal Mode "1" = Wrap Around Mode AddrP MACAIR NBIT16 VME .


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