Document
Features
• Low-voltage and Standard-voltage Operation – 2.7 (VCC = 2.7V to 5.5V) – 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K)
• Two-wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bidirectional Data Transfer Protocol • 100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility • Write Protect Pin for Hardware Data Protection • 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes • Partial Page Writes Allowed • Self-timed Write Cycle (5 ms max) • High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years • Automotive Devices Available • 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 5-lead
SOT23, 8-lead TSSOP and 8-ball dBGA2 Packages • Die Sales: Wafer Form, Waffle Pack and Bumped Wafers
Description
The AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24C01A/02/04/08A/16A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 5-lead SOT23 (AT24C01A/AT24C02/AT24C04), 8-lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
Table 1. Pin Configuration
8-lead TSSOP
8-lead SOIC
Pin Name A0 - A2 SDA
Function Address Inputs Serial Data
A0 A1 A2 GND
1 2 3 4
8 VCC 7 WP 6 SCL 5 SDA
A0 A1 A2 GND
1 2 3 4
8 VCC 7 WP 6 SCL 5 SDA
SCL WP NC GND VCC
Serial Clock Input Write Protect No Connect Ground Power Supply
8-ball dBGA2
VCC WP SCL SDA
8 7 6 5
1 A0 2 A1 3 A2 4 GND
Bottom View 8-lead PDIP
8-lead Ultra Thin Mini-MAP (MLP 2x3)
VCC 8 WP 7 SCL 6 SDA 5
1 A0 2 A1 3 A2 4 GND
Bottom View 5-lead SOT23
A0 A1 A2 GND
1 2 3 4
8 VCC 7 WP 6 SCL 5 SDA
SCL GND SDA
1 2 3
5 WP 4 VCC
Two-wire Serial EEPROM
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
8K (1024 x 8)
16K (2048 x 8)
AT24C01A(1) AT24C02(2) AT24C04 AT24C08A AT24C16A(3)
Notes:
1. Not Recommended for new design; Please refer to AT24C01B datasheet.
2. Not Recommended for new design; Please refer to AT24C02B datasheet.
3. Not Recommended for new design; Please refer to AT24C16B datasheet
0180Z1–SEEPR–5/07
1
Absolute Maximum Ratings
Operating Temperature..................................–55°C to +125°C Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA
Figure 1. Block Diagram
*NOTICE:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2 AT24C01A/02/04/08A/16A
0180Z1–SEEPR–5/07
Pin Description
AT24C01A/02/04/08A/16A
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or opencollector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect and can be connected to ground.
The AT24C08A only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are no connects and can be connected to ground.
The AT24C16A does not use the device address pins, which limits the number of devices on a single bus to one. The A0, A1 and A2 pins are no connects and can be connected to ground.
WRITE PROTECT (WP): The AT24C01A/02/04/08A/16A has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal Read/Write operations when connected to ground (GND). When the Write Protect pin is connected to VCC, the write protection feature is enabled and operates as shown in Table 2.
Table 2. Write Protect
WP .