Document
HUF75329G3, HUF75329P3, HUF75329S3S
Data Sheet December 2001
49A, 55V, 0.024 Ohm, N-Channel UltraFET Power MOSFETs
These N-Channel power MOSFETs are manufactured using the innovative UltraFET® process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, lowvoltage bus switches, and power management in portable and battery-operated products. Formerly developmental type TA75329.
Features
• 49A, 55V • Ultra Low On-Resistance, rDS(ON) = 0.024Ω • Temperature Compensating PSPICE® and SABER™ Models - Available on the web at: www.fairchildsemi.com • Thermal Impedance PSPICE and SABER Models • Peak Current vs Pulse Width Curve • UIS Rating Curve • Related Literature - TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”
Symbol
D
Ordering Information
PART NUMBER HUF75329G3 HUF75329P3 HUF75329S3S PACKAGE TO-247 TO-220AB TO-263AB BRAND 75329G 75329P 75329S
G
S
NOTE: When ordering, use the entire part number. Add the suffix T to obtain the TO-263AB variant in tape and reel, e.g., HUF75329S3ST.
Packaging
JEDEC STYLE TO-247
SOURCE DRAIN GATE DRAIN (FLANGE)
JEDEC TO-220AB
SOURCE DRAIN GATE
DRAIN (TAB)
JEDEC TO-263AB
GATE SOURCE
DRAIN (FLANGE)
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html For severe environments, see our Automotive HUFA series. All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF75329G3, HUF75329P3, HUF75329S3S Rev. B
HUF75329G3, HUF75329P3, HUF75329S3SOGM
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified 55 55 ±20 49 Figure 4 Figures 6, 14, 15 128 0.86 -55 to 175 300 260 UNITS V V V A
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . Tpkg
W W/oC oC
oC oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 150oC.
Electrical Specifications
PARAMETER OFF STATE SPECIFICATIONS
TC = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current
BVDSS IDSS
ID = 250µA, VGS = 0V (Figure 11) VDS = 50V, VGS = 0V VDS = 45V, VGS = 0V, TC = 150oC VGS = ±20V VGS = VDS, ID = 250µA (Figure 10) ID = 49A, VGS = 10V (Figure 9)
55 -
-
1 250 ±100
V µA µA nA
Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
IGSS
VGS(TH) rDS(ON)
2 -
0.020
4 0.024
V Ω
RθJC RθJA
(Figure 3) TO-247 TO-220, TO-263
-
-
1.17 30 62
oC/W oC/W oC/W
SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at 10V Threshold Gate Charge Gate to Source Gate Charge Gate to Drain “Miller” Charge Qg(TOT) Qg(10) Qg(TH) Qgs Qgd VGS = 0V to 20V VGS = 0V to 10V VGS = 0V to 2V VDD = 30V, ID ≅ 49A, RL = 0.61Ω Ig(REF) = 1.0mA (Figure 13) 60 35 2.0 5 13 75 43 2.5 nC nC nC nC nC tON td(ON) tr td(OFF) tf tOFF VDD = 30V, ID ≅ 49A, RL = 0.61Ω, VGS = 10V, RGS = 9.1Ω 12 58 33 33 105 100 ns ns ns ns ns ns
©2001 Fairchild Semiconductor Corporation
HUF75329G3, HUF75329P3, HUF75329S3S Rev. B
HUF75329G3, HUF75329P3, HUF75329S3S
Electrical Specifications
PARAMETER CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacita.