Document
HUF76113DK8
Data Sheet January 2003
6A, 30V, 0.032 Ohm, Dual N-Channel, Logic Level UltraFET Power MOSFET
This N-Channel power MOSFET is ® manufactured using the innovative UltraFET process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, low-voltage bus switches, and power management in portable and batteryoperated products. Formerly developmental type TA76113.
Features
• Logic Level Gate Drive • 6A, 30V • Ultra Low On-Resistance, rDS(ON) = 0.032Ω • Temperature Compensating PSPICE® Model • Temperature Compensating SABER™ Model • Thermal Impedance SPICE Model • Thermal Impedance SABER Model • Peak Current vs Pulse Width Curve • UIS Rating Curve • Related Literature - TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”
Ordering Information
PART NUMBER HUF76113DK8 PACKAGE MS-012AA BRAND 76113DK8
Symbol
D1(8) D1(7) S1(1) G1(2)
NOTE: When ordering, use the entire part number. Add the suffix T to obtain the variant in tape and reel, e.g., HUF76113DK8T.
D2(6) D2(5) S2(3) G2(4)
Packaging
JEDEC MS-012AA
BRANDING DASH
5 1 2 3 4
©2003 Fairchild Semiconductor Corporation
HUF76113DK8 Rev. B1
HUF76113DK8
Absolute Maximum Ratings
TA = 25oC, Unless Otherwise Specified HUF76113DK8 Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (R GS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (TA= 25oC, VGS = 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TA= 100oC, VGS = 5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TA= 100oC, VGS = 4.5V) (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 30 30 ±20 6 1.8 1.7 Figure 4 Figure 6 2.5 0.02 -55 to 150 300 260 W W/oC
oC oC oC
UNITS V V V A A A
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. TJ = 25oC to 125oC. 2. 50oC/W measured using FR-4 board at 1 second. 3. 228oC/W measured using FR-4 board with 0.006 in2 footprint at 1000 seconds.
Electrical Specifications
PARAMETER OFF STATE SPECIFICATIONS
TA = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current
BVDSS IDSS
ID = 250µA, V GS = 0V (Figure 12) VDS = 25V, VGS = 0V VDS = 25V, VGS = 0V, TC = 150oC
30 -
-
1 250 ±100
V µA µA nA
Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance
IGSS
VGS = ±20V
VGS(TH) r DS(ON)
VGS = VDS, ID = 250µA (Figure 11) ID = 6A, VGS = 10V (Figures 9, 10) ID = 1.8A, VGS = 5V (Figure 9) ID = 1.7A, VGS = 4.5V (Figure 9)
1 -
0.026 0.033 0.035
3 0.032 0.041 0.043
V Ω Ω Ω
THERMAL SPECIFICATIONS Thermal Resistance Junction to Ambient RθJA Pad Area = 0.76 in2 (Note 2) Pad Area = 0.027 in2 (See TB377) Pad Area = 0.006 in2 (See TB377) SWITCHING SPECIFICATIONS (VGS = 4.5V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time tON td(ON) tr td(OFF) tf tOFF VDD = 15V, ID ≅ 1.7A, RL = 8.8Ω, VGS = 4.5V, RGS = 18Ω, (Figure 15) 17 57 32 38 110 105 ns ns ns ns ns ns 50 191 228
oC/W oC/W oC/W
©2003 Fairchild Semiconductor Corporation
HUF76113DK8 Rev. B1
HUF76113DK8
Electrical Specifications
PARAMETER SWITCHING SPE.