Document
HUFA75631P3, HUFA75631S3ST
Data Sheet December 2001
33A, 100V, 0.040 Ohm, N-Channel, UltraFET® Power MOSFETs Packaging
JEDEC TO-220AB
SOURCE DRAIN GATE
JEDEC TO-263AB
DRAIN (FLANGE)
Features
• Ultra Low On-Resistance - rDS(ON) = 0.040Ω, VGS = 10V • Simulation Models - Temperature Compensated PSPICE® and SABER™ Electrical Models - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com • Peak Current vs Pulse Width Curve • UIS Rating Curve
GATE SOURCE DRAIN (FLANGE)
HUFA75631P3
HUFA75631S3ST
Symbol
D
Ordering Information
PART NUMBER HUFA75631P3
G
PACKAGE TO-220AB TO-263AB
BRAND 75631P 75631S
HUFA75631S3ST
S
NOTE: When ordering, use the entire part number, e.g., HUFA75631S3ST. TC = 25oC, Unless Otherwise Specified HUFA75631P3 HUFA75631S3ST UNITS V V V A A
Absolute Maximum Ratings
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (TC = 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS Power Dissipation 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg NOTE: 1. TJ = 25oC to 150oC.
100 100 ±20 33 23 Figure 4 Figures 6, 14, 15 120 0.80 -55 to 175 300 260
W W/oC
oC oC oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/ Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html. All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation HUFA75631P3, HUFA75631S3ST Rev. B
HUFA75631P3, HUFA75631S3ST
Electrical Specifications
PARAMETER OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current BVDSS IDSS ID = 250µA, VGS = 0V (Figure 11) VDS = 95V, VGS = 0V VDS = 90V, VGS = 0V, TC = 150oC Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RθJC RθJA TO-220, TO-263 1.25 62
oC/W oC/W
TC = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
100 -
-
1 250 ±100
V µA µA nA
IGSS
VGS = ±20V
VGS(TH) rDS(ON)
VGS = VDS, ID = 250µA (Figure 10) ID = 33A, VGS = 10V (Figure 9)
2 -
0.033
4 0.040
V Ω
SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at 10V Threshold Gate Charge Gate to Source Gate Charge Gate to Drain “Miller” Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figure 12) 1220 295 100 pF pF pF Qg(TOT) Qg(10) Qg(TH) Qgs Qgd VGS = 0V to 20V VGS = 0V to 10V VGS = 0V to 2V VDD = 50V, ID = 33A, Ig(REF) = 1.0mA (Figures 13, 16, 17) 66 35 2.4 5.4 13 79 42 2.9 nC nC nC nC nC tON td(ON) tr td(OFF) tf tOFF VDD = 50V, ID = 33A VGS = 10V, RGS = 9.1Ω (Figures 18, 19) 9.5 57 40 55 100 145 ns ns ns ns ns ns
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage SYMBOL VSD ISD = 33A ISD = 17A Reverse Recovery Time Reverse Recovered Charge trr QRR ISD = 33A, dISD/dt = 100A/µs ISD = 33A, dISD/dt = 100A/µs TEST CONDITIONS MI.