Parallel Converter. HV513 Datasheet

HV513 Converter. Datasheet pdf. Equivalent

Part HV513
Description 8-Channel Serial to Parallel Converter
Feature Supertex inc. HV513 8-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs, PO.
Manufacture Supertex Inc
Datasheet
Download HV513 Datasheet




HV513
Supertex inc.
HV513
8-Channel Serial to Parallel Converter with High Voltage
Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect
Features
►HVCMOS® technology
►Operating output voltage of 250V
►Low power level shifting from 5.0 to 250V
►Shift register speed 8.0MHz @ VDD = 5.0V
►8 latch data outputs
►Output polarity and blanking
►Output short circuit detect
►Output high-Z control
►CMOS compatible inputs
Applications
Piezoelectric transducer driver
Braille driver
Weaving applications
Printer drivers
MEMs
Displays
General Description
The HV513 is a low voltage serial to high voltage parallel converter
with 8 high voltage push-pull outputs. This device has been designed
to drive small capacitve loads such as piezoelectric transducers. It can
also be used in any application requiring multiple high voltage outputs,
with medium current source and sink capabilities.
The device consists of an 8-bit shift register, 8 latches, and control logic
to perform the polarity select and blanking of the outputs. Data is shifted
through the shift register on the low to high transition of the clock. A data
output buffer is provided for cascading devices. Operation of the shift
register is not affected by the LE, BL, POL, or the HI-Z control inputs.
Transfer of data from the shift register to the latch occurs when the LE
is high. The data in the latch is stored when LE is low. A high-Z (HI-Z)
pin is provided to set all the outputs in a high-Z state.
All outputs have short circuit protection that detects if the outputs have
reached the required output state. If output does not track the required
state, then the SHORT pin will be low. This output will pulse low during
the output transistion period under normal operation; see SC Timing
Diagram for details.
All outputs will have a break-before-make circuitry to reduce cross-over
current during output state changes.
The POL, BL, LE, and HI-Z inputs have an internal pull up resistor.
Typical Application Circuit
Low Voltage
Power Supply
High Voltage
Power Supply
FPGA
DIN
CLK Low Voltage
LE
BL
POL
HiZ
Shift Register
Latches
Output
Controller
8
/
HVOUT1
High Voltage
Level
Translators
&
Push-Pull
Output
Buffers
HVOUT8
DOUT
DIN to the next HV513 for cascading
SHORT
Piezo
Element
Supertex HV513
Doc.# DSFP-HV513
C072413
Supertex inc.
www.supertex.com



HV513
Ordering Information
Part Number
Package
HV513K7-G
32-Lead QFN
HV513K7-G M935 32-Lead QFN
HV513WG-G
24-Lead SOW
-G denotes a lead (Pb)-free / RoHS compliant package
Packing
400/Tray
2000/Reel
1000/Reel
Pin Configuration
32
1
1
HV513
24
Absolute Maximum Ratings
Parameter
Value
Logic supply, VDD
High voltage supply, VPP
-0.5V to 6.0V
VDD to 275V
32-Lead QFN
(top view)
24-Lead SOW
(top view)
Logic input levels
Ground current1
-0.5V to VDD +0.5V
0.3A
Product Marking
High voltage supply current1
Continuous total power dissipation2
0.25A
750mW
HV513
LLLLLL
L = Lot Number
YY = Year Sealed
WW = Week Sealed
Operating junction temperature
-40°C to +85°C
YYWW
AAACCC
A = Assembler ID
C = Country of Origin
Storage temperature range
-65°C to +150°C
= “Green” Packaging
Absolute Maximum Ratings are those values beyond which damage to the Package may or may not include the following marks: Si or
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect device
32-Lead QFN
reliability. All voltages are referenced to device ground.
Notes:
1. Connection to all power and ground pads is required. Duty cycle is limited
by the total power dissipated in the package.
2. For operation above 25°C ambient derate linearly to 85°C at 12mW/°C.
Typical Thermal Resistance
Top Marking
YYWW AAA
HV513WG
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
YY = Year Sealed
WW = Week Sealed
A = Assembler ID
L = Lot Number
C = Country of Origin*
= “Green” Packaging
Package
32-Lead QFN
24-Lead SOW
θja
22OC/W
44OC/W
*May be part of top marking
Package may or may not include the following marks: Si or
24-Lead SOW
Typical Operating Conditions
Sym Parameter
Min
VDD Logic supply voltage
4.5
VPP High voltage supply
50
VIH High-level input voltage
VDD -0.9
VIL Low-level input voltage
0
TJ Operating junction temperature
Notes:
1. Below minimum VPP the output may not switch.
2. Power-up sequence should be the following:
1. Connect ground
2.
3.
ASpept layllVinDDputs (Data, CLK, Enable, etc.) to a known state
4. Apply VPP
-40
Power-down sequence should be the reverse of the above
Doc.# DSFP-HV513
C072413
2
Typ Max Units Conditions
5.0 5.5 V ---
- 250 V Note 1
- VDD V ---
- 0.9 V ---
- +85 °C ---
Supertex inc.
www.supertex.com







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