EDO DRAM. HV51V7403HGL-5 Datasheet

HV51V7403HGL-5 DRAM. Datasheet pdf. Equivalent

Part HV51V7403HGL-5
Description 4M x 4Bit EDO DRAM
Feature HY51V(S)17403HG/HGL 4M x 4Bit EDO DRAM PRELIMINARY DESCRIPTION The HY51V(S)17403HG/HGL is the new g.
Manufacture Hynix Semiconductor
Datasheet
Download HV51V7403HGL-5 Datasheet



HV51V7403HGL-5
HY51V(S)17403HG/HGL
4M x 4Bit EDO DRAM
PRELIMINARY
DESCRIPTION
The HY51V(S)17403HG/HGL is the new generation dynamic RAM organized 4,194,304 words x 4bit.
HY51V(S)17403HG/HGL has realized higher density, higher performance and various functions by utiliz-
ing advanced CMOS process technology. The HY51V(S)17403HG/HGL offers Extended Data Out Page-
Mode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)17403HG/HGL to be
packaged in standard 300mil 24(26)pin SOJ and 24(26) pin TSOP-II. The package size provides high sys-
tem bit densities and is compatible with widely available automated testing and insertion equipment.
System oriented features include single power supply 3.3V +/- 0.3V tolerance, direct interfacing capability
with high performance logic families such as Schottky TTL.
FEATURES
• Extended Data Out Mode capability
• Read-modify-write capability
• Multi-bit parallel test capability
• TTL(3.3V) compatible inputs and outputs
• /RAS only, CAS-before-/RAS, Hidden and self
refresh(L-version) capability
Fast access time and cycle time
• JEDEC standard pinout
• 24(26)pin plastic SOJ / 24(26)pin TSOP-II
• Single power supply of 3.3V +/- 0.3V
• Battery back up operation(L-version)
Part No
HY51V(S)17403HG/HGL-5
HY51V(S)17403HG/HGL-6
HY51V(S)17403HG/HGL-7
tRAC
50ns
60ns
70ns
tCAC
13ns
15ns
18ns
tRC
84ns
104ns
124ns
tHPC
20ns
25ns
30ns
• Power dissipation
Active
Standby
50ns
60ns
70ns
432mW
369mW
360mW
7.2mW(CMOS level Max)
0.36mW (L-version : Max)
ORDERING INFORMATION
Refresh cycle
Part No
HY51V17403HG
HY51V17403HGL
Ref Normal L-part
2K 32ms
2K 128ms
Part Number
HY51V(S)17403HGJ/HG(L)J-5
HY51V(S)17403HGJ/HG(L)J-6
HY51V(S)17403HGJ/HG(L)J-7
HY51V(S)17403HGT/HG(L)T-5
HY51V(S)17403HGT/HG(L)T-6
HY51V(S)17403HGT/HG(L)T-7
(S) : Self refresh,
(L) : Low power
Access Time
50ns
60ns
70ns
50ns
60ns
70ns
Package
300mil 24(26)pin SOJ
300mil 24(26)pin TSOP-II
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.0.1/Apr.01



HV51V7403HGL-5
PIN CONFIGURATION
VCC 1
I/O1 2
I/O2 3
WE 4
RAS 5
A11 6
A10 8
A0 9
A1 10
A2 11
A3 12
VCC 13
26 VSS
25 I/O4
24 I/O3
23 CAS
22 OE
21 A9
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
24(26) Pin Plastic SOJ
HY51V(S)17403HG/HGL
VCC 1
I/O1 2
I/O2 3
WE 4
RAS 5
A11 6
A10 8
A0 9
A1 10
A2 11
A3 12
VCC 13
26 VSS
25 I/O4
24 I/O3
23 CAS
22 OE
21 A9
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
24(26) Pin Plastic TSOP-II
PIN DESCRIPTION
Pin
/RAS
/CAS
/WE
/OE
A0-A11
A0-A11
I/O 1- I/O 4
Vcc
Vss
NC
Function
Row Address Strobe
Column Address Strobe
Write Enable
Output Enable
Address Inputs
Refresh Address Inputs
Data Input / Output
Power (3.3V)
Ground
No connection
Rev.0.1/Apr.01
2







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