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HV51V7403HGL-7 Dataheets PDF



Part Number HV51V7403HGL-7
Manufacturers Hynix Semiconductor
Logo Hynix Semiconductor
Description 4M x 4Bit EDO DRAM
Datasheet HV51V7403HGL-7 DatasheetHV51V7403HGL-7 Datasheet (PDF)

HY51V(S)17403HG/HGL 4M x 4Bit EDO DRAM PRELIMINARY DESCRIPTION The HY51V(S)17403HG/HGL is the new generation dynamic RAM organized 4,194,304 words x 4bit. HY51V(S)17403HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)17403HG/HGL offers Extended Data Out PageMode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)17403HG/HGL to be packaged in standard 300mil 24(26)pin SOJ and 24(26) pin.

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HY51V(S)17403HG/HGL 4M x 4Bit EDO DRAM PRELIMINARY DESCRIPTION The HY51V(S)17403HG/HGL is the new generation dynamic RAM organized 4,194,304 words x 4bit. HY51V(S)17403HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)17403HG/HGL offers Extended Data Out PageMode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)17403HG/HGL to be packaged in standard 300mil 24(26)pin SOJ and 24(26) pin TSOP-II. The package size provides high system bit densities and is compatible with widely available automated testing and insertion equipment. System oriented features include single power supply 3.3V +/- 0.3V tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. FEATURES • • • • • Extended Data Out Mode capability Read-modify-write capability Multi-bit parallel test capability TTL(3.3V) compatible inputs and outputs /RAS only, CAS-before-/RAS, Hidden and self refresh(L-version) capability Fast access time and cycle time Part No HY51V(S)17403HG/HGL-5 HY51V(S)17403HG/HGL-6 HY51V(S)17403HG/HGL-7 tRAC 50ns 60ns 70ns • • • • JEDEC standard pinout 24(26)pin plastic SOJ / 24(26)pin TSOP-II Single power supply of 3.3V +/- 0.3V Battery back up operation(L-version) • tCAC 13ns 15ns 18ns tRC 84ns 104ns 124ns tHPC 20ns 25ns 30ns • Power dissipation 50ns Active Standby 432mW 60ns 369mW 70ns 360mW • Refresh cycle Part No HY51V17403HG HY51V17403HGL Ref 2K 2K Normal 32ms 128ms L-part 7.2mW(CMOS level Max) 0.36mW (L-version : Max) ORDERING INFORMATION Part Number HY51V(S)17403HGJ/HG(L)J-5 HY51V(S)17403HGJ/HG(L)J-6 HY51V(S)17403HGJ/HG(L)J-7 HY51V(S)17403HGT/HG(L)T-5 HY51V(S)17403HGT/HG(L)T-6 HY51V(S)17403HGT/HG(L)T-7 (S) : Self refresh, (L) : Low power Access Time 50ns 60ns 70ns 50ns 60ns 70ns Package 300mil 24(26)pin SOJ 300mil 24(26)pin TSOP-II This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.0.1/Apr.01 HY51V(S)17403HG/HGL PIN CONFIGURATION VCC I/O1 I/O2 WE RAS A11 A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 26 25 24 23 22 21 VSS I/O4 I/O3 CAS OE A9 A8 A7 A6 A5 A4 VSS VCC I/O1 I/O2 WE RAS A11 A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 26 25 24 23 22 21 VSS I/O4 I/O3 CAS OE A9 A8 A7 A6 A5 A4 VSS 8 9 10 11 12 13 19 18 17 16 15 14 8 9 10 11 12 13 19 18 17 16 15 14 24(26) Pin Plastic SOJ 24(26) Pin Plastic TSOP-II PIN DESCRIPTION Pin /RAS /CAS /WE /OE A0-A11 A0-A11 I/O 1- I/O 4 Vcc Vss NC Function Row Address Strobe Column Address Strobe Write Enable Output Enable Address Inputs Refresh Address Inputs Data Input / Output Power (3.3V) Ground No connection Rev.0.1/Apr.01 2 HY51V(S)17403HG/HGL ABSOLUTE MAXIMUM RATINGS Parameter Ambient Temperature Storage Temperature Voltage on Any Pin relative to Vss Voltage on Vcc relative to Vss Short Circuit Output Current Power Dissipation Symbol TA TSTG VT Vcc IOUT PT Rating 0 ~ 70 -55 ~ 125 -0.5 ~ Vcc + 0.5 (Max 4.6V) -0.5 ~ 4.6 50 1 Unit o o C C V V mA W Recommended DC OPERATING CONDITIONS (TA=0 to 70 oC) Parameter Power Supply Voltage Input High Voltage Input Low Voltage Symbol Vcc VIH VIL Min 3.0 2.0 -0.3 Typ. 3.3 Max 3.6 Vcc + 0.3 0.8 Unit V V V Note Note : All voltages are referenced to Vss Rev.0.1/Apr.01 3 HY51V(S)17403HG/HGL DC CHARACTERISTICS (Vcc = 3.3V +/- 10%, TA=0 to 70°C) Symbol VOH Output Level Output Level voltage(Iout= -2mA) Output Level Output Level voltage(Iout=2mA) 50ns ICC1 Parameter Min 2.4 Max Vcc Unit V Note VOL 0 - 0.4 100 90 80 V Operating current Average power supply operating current ( /RAS, /CAS Cycling : tRC = tRC min) Standby current (TTL interface) Power supply standby current (/RAS, /CAS=VIH, Dout = High-Z) /RAS only refresh current Average power supply current /RAS only refresh mode (tRC= tRC min) 60ns 70ns mA 1, 2 ICC2 - 2 mA 50ns 60ns 70ns 50ns - 100 90 80 90 80 75 1 100 100 90 80 300 uA 4 mA mA uA 4 mA 1, 3 mA 2 ICC3 ICC4 Fast page mode current Average power supply current Fast page mode (tPC=tPC min) CMOS interface ( /RAS, /CAS >= Vcc-0.2V, Dout = High-Z) 60ns 70ns ICC5 Standby current ( L-version) 50ns ICC6 - /CAS-before-/RAS refresh current (tRC=tRC min) 60ns 70ns ICC7 Battery back up operating current (standby with CBR refresh) (tRC=31.3us, tRAS<=0.3us, Dout=High-Z) Standby current ( /RAS = VIH, /CAS = VIL, Dout=Enable) Self refresh current (/RAS, /CAS <=0.2V, Dout=High-Z, CMOS interface) Input leakage current, Any input (0V<= Vin<=4.6V) Output leakage current, (Dout is disabled, 0V<= Vout<=4.6V) ICC8 - 5 uA 1 ICC9 II(L) IO(L) -10 -10 200 10 10 uA uA uA 4 Note : 1. Icc depends on output load condition when the device is selected, Icc(max) is specified at the output open condition 2. Address can be changed once or less while /RAS=VIL 3. Address can be changed once or less while /CAS=VIH 4. /CAS.


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