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HS1-54C138RH Dataheets PDF



Part Number HS1-54C138RH
Manufacturers Intersil Corporation
Logo Intersil Corporation
Description Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer
Datasheet HS1-54C138RH DatasheetHS1-54C138RH Datasheet (PDF)

HS-54C138RH February 1996 Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW A 1 B 2 C 3 G2A 4 G2B 5 G1 6 Y7 7 GND 8 16 VDD 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 Features • Devices QML Qualified in Accordance With MIL-PRF-38535 • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95825 and Intersil’ QM Plan • Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD (Si) -.

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HS-54C138RH February 1996 Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW A 1 B 2 C 3 G2A 4 G2B 5 G1 6 Y7 7 GND 8 16 VDD 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 Features • Devices QML Qualified in Accordance With MIL-PRF-38535 • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95825 and Intersil’ QM Plan • Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD (Si) - Latch-Up Immune > 1 x 1012 RAD (Si)/s • Multiple Input Enable for Easy Expansion • Single Power Supply +5V • Outputs Active Low • Low Standby Power (0.5mW Max at +5V) • High Noise Immunity • Equivalent to Sandia SA2995 • Bus Compatible with Intersil Rad-Hard 80C85RH • Full Military Temperature Range -55oC to +125oC Description The Intersil HS-54C138RH is a radiation hardened 3- to 8-line decoder fabricated using a radiation hardened EPI-CMOS process. It features low power consumption, high noise immunity, and high speed. Also featured are pin and function compatibility with the 54LS138 industry standard part. The HS-54C138RH is ideally suited for high speed memory chip select address decoding. It is intended for use with the Intersil HS-80C85RH radiation hardened microprocessor, but it can also be utilized as a demultiplexer in any low power rad-hard application. The HS-54C138RH contains a one of eight binary decoder. A three bit binary input is used to select and activate each of the eight outputs, provided the three chip enable inputs are also present (see truth table). The HS-54C138RH has an on-chip enable gate. The active high (G1) and both active low (G2A, G2B) inputs are Anded together to provide a single enable input to the device. The use of both active high and active low inputs minimizes the need for external gates when expanding a system. 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16 TOP VIEW A B C G2A G2B G1 Y7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD Y0 Y1 Y2 Y3 Y4 Y5 Y6 Ordering Information PART NUMBER 5962R9582501QEC 5962R9582501QXC 5962R9582501VEC 5962R9582501VXC HS1-54C138RH/SAMPLE HS9-54C138RH/SAMPLE TEMPERATURE RANGE -55oC -55oC -55oC -55oC to to to to +125oC +125oC +125oC +125oC SCREENING LEVEL MIL-PRF-38535 Level Q MIL-PRF-38535 Level Q MIL-PRF-38535 Level V MIL-PRF-38535 Level V Sample Sample PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack +25oC +25oC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 Spec Number File Number 1 518053 3037.2 Specifications HS-54C138RH Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V I/O Voltage Applied. . . . . . . . . . . . . . . . . . GND -0.3V to VDD +0.3V Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Reliability Information Thermal Resistance θJA θJC SBDIP Package . . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Voltage Range . . . . . . . . . . . . . . . . . . . +4.75V to +5.25V Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 1.0V Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . VDD-1.0V to VDD TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 7, 8A, 8B LIMITS TEMPERATURE -55oC, +25oC, +125oC -55oC, +25oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC MIN -1 4.25 0.5 MAX 1 100 UNITS µA µA V V µA - PARAMETER Input Leakage Current High Input Leakage Current .


HS1-5104ARH-T HS1-54C138RH HS1-565ARH


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