CMOS PROM. HS1-6617RH Datasheet

HS1-6617RH PROM. Datasheet pdf. Equivalent

Part HS1-6617RH
Description Radiation Hardened 2K x 8 CMOS PROM
Feature HS-6617RH-T Data Sheet July 1999 File Number 4608.1 Radiation Hardened 2K x 8 CMOS PROM Intersil’s .
Manufacture Intersil Corporation
Datasheet
Download HS1-6617RH Datasheet



HS1-6617RH
Data Sheet
HS-6617RH-T
July 1999 File Number 4608.1
Radiation Hardened 2K x 8 CMOS PROM
Intersil’s Satellite Applications FlowTM (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil HS-6617RH-T is a radiation hardened 16k
CMOS PROM, organized in a 2K word by 8-bit format. The
chip is manufactured using a radiation hardened CMOS
process, and is designed to be functionally equivalent to the
HM-6617. Synchronous circuit design techniques combine
with CMOS processing to give this device high speed
performance with very low power dissipation.
On chip address latches are provided, allowing easy
interfacing with recent generation microprocessors that use
multiplexed address/data bus structure, such as the
HS-80C86RH. The output enable control (G) simplifies
microprocessor system interfacing by allowing output data
bus control, in addition to, the chip enable control.
Synchronous operation of the HS-6617RH-T is ideal for high
speed pipe-lined architecture systems and also in
synchronous logic replacement functions.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-6617RH-T
are contained in SMD 5962-95708. A “hot-link” is provided
from our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
ORDERING
NUMBER
5962R9570801TJC
HS1-6617RH/Proto
PART NUMBER
HS1-6617RH-T
HS1-6617RH/Proto
TEMP.
RANGE
(oC)
-55 to 125
-55 to 125
5962R9570801TXC
HS9-6617RH-T
-55 to 125
HS9-6617RH/Proto
HS9-6617RH/Proto
-55 to 125
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose (γ) 1 x 105 RAD(Si)
- SEU LET 16MeV/mg/cm2
- SEL LET 100MeV/mg/cm2
• Field Programmable Nicrome Fuse Links
• Low Standby Power 1.1mW Max
• Low Operating Power 137.5mW/MHz Max
• Fast Access Time 100ns Max
• TTL Compatible Inputs/Outputs
• Synchronous Operation
• On Chip Address Latches, Three-State Outputs
Pinouts
HS1-6617RH-T (SBDIP), CDIP2-T24
TOP VIEW
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
Q0 9
Q1 10
Q2 11
GND 12
24 VDD
23 A8
22 A9
21 P
20 G
19 A10
18 E
17 Q7
16 Q6
15 Q5
14 Q4
13 Q3
HS9-6617RH-T (FLATPACK), CDFP4-F24
TOP VIEW
A7 1
24 VDD
A6 2
23 A8
A5 3
22 A9
A4 4
21 P
A3 5
20 G
A2 6
19 A10
A1 7
18 E
A0 8
17 Q7
Q0 9
16 Q6
Q1 10 15 Q5
Q2 11 14 Q4
GND 12 13 Q3
P must be hardwired at all times to VDD, except during
programming.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.



HS1-6617RH
HS-6617RH-T
Functional Diagram
MSB
A10
A9
A8
A7
A6
A5
A4
LSB
P
E
LATCHED
ADDRESS
REGISTER
7A
7A
GATED
ROW
DECODER
128
128 x 128
MATRIX
E E 16 16 16 16 16 16 16 16
8 GATE COLUMN
DECODER
8
PROGRAMMING, AND DATA
E OUTPUT CONTROL
A4
A4
1 OF 8
G
ALL LINES POSITIVE LOGIC:
ACTIVE HIGH
THREE STATE BUFFERS:
A HIGH
OUTPUT ACTIVE
E LATCHED ADDRESS
REGISTER
MSB
LSB
A3 A2 A1 A0
ADDRESS LATCHES & GATED DECODERS:
LATCH ON FALLING EDGE OF E
GATE ON FALLING EDGE OF G
P = HARDWIRED TO VDD EXCEPT DURING PROGRAMMING
Q0 - Q7
TRUTH TABLE
EG
MODE
0 0 Enabled
0 1 Output Disabled
1 X Disabled
Timing Waveform
ADDRESSES
TAVQV
1.5V
1.5V
VALID
ADDRESS
TAVEL
TELAX
TELEL
TELEH
1.5V
1.5V
E
TEHEL
TELQV
G TGLQV
1.5V
TGLQX
DATA
OUTPUT
Q0 - Q7
TELQX
3.0V
VALID
ADDRESSES
0V
1.5V
1.5V
TGHQZ
VALID
DATA
3.0V
1.5V
0V
TEHQZ
3.0V
0V
TS
FIGURE 1. READ CYCLE
2







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