FIR Filter. HSP43168 Datasheet

HSP43168 Filter. Datasheet pdf. Equivalent

Part HSP43168
Description Dual FIR Filter
Feature HSP43168 Data Sheet November 1999 File Number 2808.8 Dual FIR Filter The HSP43168 Dual FIR Filter c.
Manufacture Intersil Corporation
Datasheet
Download HSP43168 Datasheet

HSP43168 Data Sheet November 1999 File Number 2808.8 Dual F HSP43168 Datasheet
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HSP43168
Data Sheet
HSP43168
November 1999 File Number 2808.8
Dual FIR Filter
The HSP43168 Dual FIR Filter consists of two independent
8-tap FIR filters. Each filter supports decimation from 1 to 16
and provides on-board storage for 32 sets of coefficients.
The Block Diagram shows two FIR cells each fed by a
separate coefficient bank and one of two separate inputs.
The outputs of the FIR cells are either summed or
multiplexed by the MUX/Adder. The compute power in the
FIR Cells can be configured to provide quadrature filtering,
complex filtering, 2-D convolution, 1-D/2-D correlations, and
interpolating/decimating filters.
The FIR cells take advantage of symmetry in FIR
coefficients by pre-adding data samples prior to
multiplication. This allows an 8-tap FIR to be implemented
using only 4 multipliers per filter cell. These cells can be
configured as either a single 16-tap FIR filter or dual 8-tap
FIR filters. Asymmetric filtering is also supported.
Decimation of up to 16 is provided to boost the effective number
of filter taps from 2 to 16 times. Further, the Decimation
Registers provide the delay necessary for fractional data
conversion and 2-D filtering with kernels to 16 x16.
The flexibility of the Dual is further enhanced by 32 sets of
user programmable coefficients. Coefficient selection may
be changed asynchronously from clock to clock. The ability
to toggle between coefficient sets further simplifies
applications such as polyphase or adaptive filtering.
The HSP43168 is a low power fully static design
implemented in an advanced CMOS process. The
configuration of the device is controlled through a standard
microprocessor interface.
Features
• Two Independent 8-Tap FIR Filters Configurable as a
Single 16-Tap FIR
• 10-Bit Data and Coefficients
• On-Board Storage for 32 Programmable Coefficient Sets
• Up To: 256 FIR Taps, 16 x 16 2-D Kernels, or 10 x 19-Bit
Data and Coefficients
• Programmable Decimation to 16
• Programmable Rounding on Output
• Standard Microprocessor Interface
Applications
• Quadrature, Complex Filtering
• Image Processing
• Polyphase Filtering
• Adaptive Filtering
Ordering Information
PART NUMBER
HSP43168VC-33
HSP43168VC-40
HSP43168VC-45
HSP43168JC-33
HSP43168JC-40
HSP43168JC-45
HSP43168JI-40
HSP43168GC-45
TEMP.
RANGE (oC) PACKAGE
0 to 70 100 Ld MQFP
0 to 70 100 Ld MQFP
0 to 70 100 Ld MQFP
0 to 70 84 Ld PLCC
0 to 70 84 Ld PLCC
0 to 70 84 Ld PLCC
-40 to 85 84 Ld PLCC
0 to 70 84 Ld CPGA
PKG. NO.
Q100.14x20
Q100.14x20
Q100.14x20
N84.1.15
N84.1.15
N84.1.15
N84.1.15
G84.A
Block Diagram
CIN0 - 9
A0 - 8
WR
CSEL0 - 4
10
INA0 - 9
10
9
COEFFICIENT
BANK A
FIR CELL A
INB0 - 9/ 10
OUT0 - 8
MUX
OEL
OEH
9
MUX
COEFFICIENT
BANK B
FIR CELL B
MUX /
ADDER
19
CONTROL /
CONFIGURATION
OUT9 - 27
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 407-727-9207 | Copyright © Intersil Corporation 1999



HSP43168
HSP43168
Pinouts
84 LEAD CPGA
BOTTOM VIEW
11 10 9 8 7 6 5 4 3 2 1 PIN
'A1'
ID
A RVRS WR GND A1 A4 A7 A8 CSEL1 CSEL3 CSEL4 CIN8
A
B SHFTEN MUX0 MUX1 A0 A3 A2 VCC CSEL2 CIN9 CIN7 CIN5 B
C TXFR FWRD
A5 A6 CSEL0
CIN6 CIN4 C
D VCC ACCEN
GND CIN3 D
E OEH GND CLK
F OUT27 OUT22 OUT26
G OUT24 OUT23 OUT25
HSP43168
BOTTOM VIEW
CIN2 CIN1 CIN0 E
INA8 INA9 VCC F
INA7 INA5 INA6 G
84 LEAD CPGA
TOP VIEW
11 10 9 8 7 6 5 4 3 2 1
L GND OUT15 OUT14 OUT12 OUT10 OUT11 INB1 INB4 INB5 INB6 INB9 L
K OUT18 VCC OUT16 OUT13 VCC INB0 INB2 GND INB7 INB8 INA1 K
J OUT19 OUT17
OUT9 OEL INB3
INA0 INA2 J
H OUT21 OUT20
INA3 INA4 H
G OUT24 OUT23 OUT25
F OUT27 OUT22 OUT26
E OEH GND CLK
HSP43168
TOP VIEW
INA7 INA5 INA6 G
INA8 INA9 VCC F
CIN2 CIN1 CIN0 E
H OUT21 OUT20
INA3 INA4 H
J OUT19 OUT17
OUT9 OEL INB3
INA0 INA2 J
K OUT18 VCC OUT16 OUT13 VCC INB0 INB2 GND INB7 INB8 INA1 K
L GND OUT15 OUT14 OUT12 OUT10 OUT11 INB1 INB4 INB5 INB6 INB9 L
11 10 9
8
7
65
4
3
21
D VCC ACCEN
C TXFR FWRD
A5 A6 CSEL0
GND CIN3 D
CIN6 CIN4 C
B SHFTEN MUX0 MUX1 A0 A3 A2 VCC CSEL2 CIN9 CIN7 CIN5 B
A RVRS WR GND A1 A4 A7 A8 CSEL1 CSEL3 CSEL4 CIN8 A
PIN
'A1'
11 10 9 8 7 6 5 4 3 2 1 ID
84 LEAD PLCC
TOP VIEW
CIN 7
CIN 6
CIN 5
CIN 4
GND
CIN 3
CIN 2
CIN 1
CIN 0
INA 9
INA 8
INA 7
INA 6
INA 5
VCC
INA 4
INA 3
INA 2
INA 1
INA 0
INB 9
11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
RVRS
FWD
SHFTEN
TXFR
ACCEN
VCC
CLK
GND
OEH
OUT 27
OUT 26
OUT 25
OUT 24
OUT 23
OUT 22
OUT 21
OUT 20
OUT 19
OUT 18
OUT 17
VCC
2





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