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HN58V256A Dataheets PDF



Part Number HN58V256A
Manufacturers Hitachi Semiconductor
Logo Hitachi Semiconductor
Description 256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function
Datasheet HN58V256A DatasheetHN58V256A Datasheet (PDF)

HN58V256A Series HN58V257A Series 256k EEPROM (32-kword × 8-bit) Ready/Busy and RES function (HN58V257A) ADE-203-357D (Z) Rev. 4.0 Oct. 24, 1997 Description The Hitachi HN58V256A and HN58V257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit. They have realized high speed, low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make thei.

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HN58V256A Series HN58V257A Series 256k EEPROM (32-kword × 8-bit) Ready/Busy and RES function (HN58V257A) ADE-203-357D (Z) Rev. 4.0 Oct. 24, 1997 Description The Hitachi HN58V256A and HN58V257A are electrically erasable and programmable ROMs organized as 32768-word × 8-bit. They have realized high speed, low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make their write operations faster. Features • Single 3 V supply: 2.7 to 5.5 V • Access time: 120 ns max • Power dissipation:  Active: 20 mW/MHz, (typ)  Standby: 110 µW (max) • On-chip latches: address, data, CE, OE, WE • Automatic byte write: 10 ms max • Automatic page write (64 bytes): 10 ms max • Ready/Busy (only the HN58V257A series) • Data polling and Toggle bit • Data protection circuit on power on/off • Conforms to JEDEC byte-wide standard • Reliable CMOS with MNOS cell technology • 105 erase/write cycles (in page mode) • 10 years data retention • Software data protection • Write protection by RES pin (only the HN58V257A series) • Industrial versions (Temperature range: – 20 to 85˚C and – 40 to 85˚C) are also available. HN58V256A Series, HN58V257A Series Ordering Information Type No. HN58V256AFP-12 HN58V256AT-12 HN58V257AT-12 Access time 120 ns 120 ns 120 ns Package 400 mil 28-pin plastic SOP (FP-28D) 28-pin plastic TSOP (TFP-28DB) 8 × 14 mm2 32-pin plastic TSOP (TFP-32DA) Pin Arrangement HN58V256AFP Series A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (Top view) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 A2 A1 A0 I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 CE A10 15 16 17 18 19 20 21 22 23 24 25 26 27 28 (Top view) HN58V257AT Series A2 A1 A0 NC I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 NC CE A10 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 (Top view) 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A3 A4 A5 A6 A7 A12 A14 RDY/Busy VCC RES WE A13 A8 A9 A11 OE HN58V256AT Series 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 2 HN58V256A Series, HN58V257A Series Pin Description Pin name A0 to A14 I/O0 to I/O7 OE CE WE VCC VSS RDY/Busy* RES * NC Note: 1 1 Function Address input Data input/output Output enable Chip enable Write enable Power supply Ground Ready busy Reset No connection 1. This function is supported by only the HN58V257A series. Block Diagram Note: 1. This function is supported by only the HN58V257A series. VCC VSS RES *1 OE CE WE RES *1 A0 to I/O0 High voltage generator to I/O7 RDY/Busy *1 I/O buffer and input latch Control logic and timing Y decoder Y gating A5 Address buffer and latch A6 to X decoder Memory array A14 Data latch 3 HN58V256A Series, HN58V257A Series Operation Table Operation Read Standby Write Deselect Write inhibit CE VIL VIH VIL VIL × × Data polling Program reset VIL × OE VIL ×* 2 WE VIH × VIL VIH VIH × VIH × RES * 3 VH * × VH VH × × VH VIL 1 RDY/Busy* 3 High-Z High-Z High-Z to V OL High-Z — — VOL High-Z I/O Dout High-Z Din High-Z — — Data out (I/O7) High-Z VIH VIH × VIL VIL × Notes: 1. Refer to the recommended DC operating condition. 2. ×: Don’t care 3. This function is supported by only the HN58V267A series. Absolute Maximum Ratings Parameter Supply voltage relative to VSS Input voltage relative to V SS Operating temperature range* Storage temperature range 2 Symbol VCC Vin Topr Tstg Value –0.6 to +7.0 –0.5* to +7.0* 0 to +70 –55 to +125 1 3 Unit V V °C °C Notes: 1. Vin min = –3.0 V for pulse width ≤ 50 ns 2. Including electrical characteristics and data retention 3. Should not exceed VCC + 1.0 V. 4 HN58V256A Series, HN58V257A Series Recommended DC Operating Conditions Parameter Supply voltage Symbol VCC VSS Input voltage VIL VIH VH * Operating temperature Notes: 1. 2. 3. 4. 4 Min 2.7 0 –0.3* 1.9* 2 1 Typ 3.0 0 — — — — Max 5.5 0 0.6 3 Unit V V V VCC + 0.3* V VCC + 1.0 70 V °C VCC – 0.5 0 Topr VIL min: –1.0 V for pulse width ≤ 50 ns. VIH min for VCC = 3.6 to 5.5 V is 2.4 V. VIH max: VCC + 1.0 V for pulse width ≤ 50 ns. This function is supported by only the HN58V257A series. DC Characteristics (Ta = 0 to +70°C, VCC = 2.7 to 5.5 V) Parameter Input leakage current Output leakage current Standby V CC current Symbol I LI I LO I CC1 I CC2 Operating VCC current I CC3 Min — — — — — — — — Output low voltage Output high voltage Note: VOL VOH — VCC × 0.8 Typ — — — — — — — — — — Max 2* 2 20 1 8 12 12 30 0.4 — 1 Unit µA µA µA mA mA mA mA mA V V Test conditions VCC = 5.5 V, Vin = 5.5 V VCC = 5.5 V, Vout = 5.5/0.4 V CE = VCC CE = VIH Iout = 0 mA, Duty = 100%, Cycle = 1 µs at VCC = 3.6 V Iout = 0 mA, Duty = 100%, Cycle = 1 ns at VCC = 5.5 V Iout = 0 mA, Duty = 100%, Cycle = 120 µs at VCC = 3.6 V Iout = 0 mA, Duty = 100%, Cycle = 120 ns at VCC = 5.5 V I OL = 2.1 mA I OH = –400 µA 1. I LI on RES = 100 µA max (only the HN58V257A series) 5 .


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