CMOS RAM. HM-6518883 Datasheet

HM-6518883 RAM. Datasheet pdf. Equivalent


Intersil Corporation HM-6518883
HM-6518/883
March 1997
1024 x 1 CMOS RAM
Features
Description
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max
• Low Power Operation . . . . . . . . . . . . . 20mW/MHz Max
• Fast Access Time. . . . . . . . . . . . . . . . . . . . . . 180ns Max
• Data Retention . . . . . . . . . . . . . . . . . . . . . . . .at 2.0V Min
• TTL Compatible Input/Output
• High Output Drive - 2 TTL Loads
• High Noise Immunity
• On-Chip Address Register
• Two-Chip Selects for Easy Array Expansion
• Three-State Output
The HM-6518/883 is a 1024 x 1 static CMOS RAM
fabricated using self-aligned silicon gate technology.
Synchronous circuit design techniques are employed to
achieve high performance and low power operation.
On chip latches are provided for address and data outputs
allowing efficient interfacing with microprocessor systems.
The data output buffers can be forced to a high impedance
state for use in expanded memory arrays.
The HM-6518/883 is a fully static RAM and may be
maintained in any state for an indefinite period of time. Data
retention supply voltage and supply current are guaranteed
over temperature.
Ordering Information
PACKAGE
CERDIP
TEMP. RANGE
-55oC to +125oC
PART
NUMBER
HM1-6518/883
PKG. NO.
F18.3
Pinout
HM-6518/883
(CERDIP)
TOP VIEW
S1 1
E2
A0 3
A1 4
A2 5
A3 6
A4 7
Q8
GND 9
18 VCC
17 S2
16 D
15 W
14 A9
13 A8
12 A7
11 A6
10 A5
PIN DESCRIPTION
A Address Input
E Chip Enable
W Write Enable
S Chip Select
D Data Input
Q Data Output
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-85
File Number 2986.1


HM-6518883 Datasheet
Recommendation HM-6518883 Datasheet
Part HM-6518883
Description 1024 x 1 CMOS RAM
Feature HM-6518883; HM-6518/883 March 1997 1024 x 1 CMOS RAM Description The HM-6518/883 is a 1024 x 1 static CMOS RAM .
Manufacture Intersil Corporation
Datasheet
Download HM-6518883 Datasheet




Intersil Corporation HM-6518883
Functional Diagram
HM-6518/883
A5 A
A6 LATCHED 5 GATED
A7
A8
ADDRESS
REGISTER
A
ROW
DECODER
32
A9
5
G
32 x 32
MATRIX
32
D
GATED COLUMN D
Q
A
DECODER
AND DATA I/O
LATCH
Q
A
L
W 55
AA
E
LATCHED ADDRESS
REGISTER
S1, A0 A1 A2 A3 A4
S2
NOTES:
1. All lines positive logic - active high.
2. Three-state buffers: A high output active.
3. Data latches: L high Q = D; Q Latches on rising edge of L.
4. Address latches and gated decoders: Latch on falling edge of E and gate on falling edge of E.
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Intersil Corporation HM-6518883
HM-6518/883
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +0.8V
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . .VCC -2.0V to VCC
Input Rise and Fall Time. . . . . . . . . . . . . . . . . . . . . . . . . . .40ns Max
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA
θJC
CERDIP Package . . . . . . . . . . . . . . . . 75oC/W
15oC/W
Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1936 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
TABLE 1. HM-6518/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
MIN MAX UNITS
Output Low Voltage
Output High Voltage
Input Leakage Current
Output Leakage Current
Data Retention Supply Current
HM-6518B/883
HM-6518/883
Operating Supply Current
Standby Supply Current
VOL
VOH
II
IOZ
ICCDR
VCC = 4.5V,
IOL = 3.2mA
VCC = 4.5V,
IOH = -0.4mA
VCC = 5.5V,
VI = GND or VCC
VCC = 5.5V,
VO = GND or VCC
VCC = 2.0V,
E = VCC,
IO = 0mA,
VI = VCC or GND
ICCOP
ICCSB
VCC = 5.5V,
(Note 2),
E = 1MHz,
IO = 0mA,
VI = VCC or GND
VCC = 5.5V,
IO = 0mA,
VI = VCC or GND
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
-55oC TA +125oC
-
0.4
-55oC TA +125oC 2.4
-
-55oC TA +125oC -1.0 +1.0
-55oC TA +125oC -1.0 +1.0
-55oC TA +125oC
-55oC TA +125oC
-
-
-
5
10
4
V
V
µA
µA
µA
µA
mA
-55oC TA +125oC
-
10
µA
NOTES:
1. All voltages referenced to device GND.
2. Typical derating 1.5mA/MHz increase in ICCOP.
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